[llvm] r179684 - R600: Emit used GPRs count
Tom Stellard
tom at stellard.net
Mon Apr 22 21:01:52 PDT 2013
On Mon, Apr 22, 2013 at 01:29:49PM -0700, Vincent Lejeune wrote:
> Another version of this patch, with less test.
>
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
>
> From fbf9eaa3f24f0b19220556f65cc7ccbd29dd0884 Mon Sep 17 00:00:00 2001
> From: Vincent Lejeune <vljn at ovi.com>
> Date: Fri, 19 Apr 2013 20:10:12 +0200
> Subject: [PATCH] R600: Use .AMDGPU.config section to emit stacksize
>
> ---
> lib/Target/R600/AMDGPUAsmPrinter.cpp | 3 +++
> lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp | 4 ----
> lib/Target/R600/R600ControlFlowFinalizer.cpp | 26 +++++++++++++++++-----
> lib/Target/R600/R600Instructions.td | 7 ------
> lib/Target/R600/R600MachineFunctionInfo.h | 1 +
> test/CodeGen/R600/elf.r600.ll | 15 +++++++++++++
> 6 files changed, 40 insertions(+), 16 deletions(-)
> create mode 100644 test/CodeGen/R600/elf.r600.ll
>
> diff --git a/lib/Target/R600/AMDGPUAsmPrinter.cpp b/lib/Target/R600/AMDGPUAsmPrinter.cpp
> index d8a380d..dc0461a 100644
> --- a/lib/Target/R600/AMDGPUAsmPrinter.cpp
> +++ b/lib/Target/R600/AMDGPUAsmPrinter.cpp
> @@ -22,6 +22,7 @@
> #include "SIDefines.h"
> #include "SIMachineFunctionInfo.h"
> #include "SIRegisterInfo.h"
> +#include "R600MachineFunctionInfo.h"
> #include "R600RegisterInfo.h"
> #include "llvm/MC/MCContext.h"
> #include "llvm/MC/MCSectionELF.h"
> @@ -75,6 +76,7 @@ void AMDGPUAsmPrinter::EmitProgramInfoR600(MachineFunction &MF) {
> unsigned MaxGPR = 0;
> const R600RegisterInfo * RI =
> static_cast<const R600RegisterInfo*>(TM.getRegisterInfo());
> + R600MachineFunctionInfo *MFI = MF.getInfo<R600MachineFunctionInfo>();
>
> for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
> BB != BB_E; ++BB) {
> @@ -97,6 +99,7 @@ void AMDGPUAsmPrinter::EmitProgramInfoR600(MachineFunction &MF) {
> }
> }
> OutStreamer.EmitIntValue(MaxGPR + 1, 4);
> + OutStreamer.EmitIntValue(MFI->StackSize, 4);
> }
>
> void AMDGPUAsmPrinter::EmitProgramInfoSI(MachineFunction &MF) {
> diff --git a/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp b/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
> index 886a404..310c268 100644
> --- a/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
> +++ b/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
> @@ -148,10 +148,6 @@ void R600MCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS,
> return;
> } else {
> switch(MI.getOpcode()) {
> - case AMDGPU::STACK_SIZE: {
> - EmitByte(MI.getOperand(0).getImm(), OS);
> - break;
> - }
> case AMDGPU::RAT_WRITE_CACHELESS_32_eg:
> case AMDGPU::RAT_WRITE_CACHELESS_128_eg: {
> uint64_t inst = getBinaryCodeForInstr(MI, Fixups);
> diff --git a/lib/Target/R600/R600ControlFlowFinalizer.cpp b/lib/Target/R600/R600ControlFlowFinalizer.cpp
> index db66772..def2fa5 100644
> --- a/lib/Target/R600/R600ControlFlowFinalizer.cpp
> +++ b/lib/Target/R600/R600ControlFlowFinalizer.cpp
> @@ -198,6 +198,22 @@ private:
> }
> }
>
> + unsigned getHWStackSize(unsigned StackSubEntry, bool hasPush) const {
> + switch (ST.device()->getGeneration()) {
> + case AMDGPUDeviceInfo::HD4XXX:
> + if (hasPush)
> + StackSubEntry += 2;
> + break;
> + case AMDGPUDeviceInfo::HD5XXX:
> + if (hasPush)
> + StackSubEntry ++;
> + case AMDGPUDeviceInfo::HD6XXX:
> + StackSubEntry += 2;
> + break;
> + }
> + return (StackSubEntry + 3)/4; // Need ceil value of StackSubEntry/4
> + }
> +
> public:
> R600ControlFlowFinalizer(TargetMachine &tm) : MachineFunctionPass(ID),
> TII (static_cast<const R600InstrInfo *>(tm.getInstrInfo())),
> @@ -213,6 +229,7 @@ public:
> virtual bool runOnMachineFunction(MachineFunction &MF) {
> unsigned MaxStack = 0;
> unsigned CurrentStack = 0;
> + bool hasPush;
> for (MachineFunction::iterator MB = MF.begin(), ME = MF.end(); MB != ME;
> ++MB) {
> MachineBasicBlock &MBB = *MB;
> @@ -241,6 +258,7 @@ public:
> case AMDGPU::CF_ALU_PUSH_BEFORE:
> CurrentStack++;
> MaxStack = std::max(MaxStack, CurrentStack);
> + hasPush = true;
> case AMDGPU::CF_ALU:
> case AMDGPU::EG_ExportBuf:
> case AMDGPU::EG_ExportSwz:
> @@ -252,7 +270,7 @@ public:
> CfCount++;
> break;
> case AMDGPU::WHILELOOP: {
> - CurrentStack++;
> + CurrentStack+=4;
> MaxStack = std::max(MaxStack, CurrentStack);
> MachineInstr *MIb = BuildMI(MBB, MI, MBB.findDebugLoc(MI),
> getHWInstrDesc(CF_WHILE_LOOP))
> @@ -266,7 +284,7 @@ public:
> break;
> }
> case AMDGPU::ENDLOOP: {
> - CurrentStack--;
> + CurrentStack-=4;
> std::pair<unsigned, std::set<MachineInstr *> > Pair =
> LoopStack.back();
> LoopStack.pop_back();
> @@ -360,9 +378,7 @@ public:
> break;
> }
> }
> - BuildMI(MBB, MBB.begin(), MBB.findDebugLoc(MBB.begin()),
> - TII->get(AMDGPU::STACK_SIZE))
> - .addImm(MaxStack);
> + MFI->StackSize = getHWStackSize(MaxStack, hasPush);
> }
>
> return false;
> diff --git a/lib/Target/R600/R600Instructions.td b/lib/Target/R600/R600Instructions.td
> index 63d21a6..4e2e8b2 100644
> --- a/lib/Target/R600/R600Instructions.td
> +++ b/lib/Target/R600/R600Instructions.td
> @@ -928,13 +928,6 @@ ins, AsmPrint, [] >, CF_WORD0_EG, CF_WORD1_EG {
> def CF_ALU : ALU_CLAUSE<8, "ALU">;
> def CF_ALU_PUSH_BEFORE : ALU_CLAUSE<9, "ALU_PUSH_BEFORE">;
>
> -def STACK_SIZE : AMDGPUInst <(outs),
> -(ins i32imm:$num), "nstack $num", [] > {
> - field bits<8> Inst;
> - bits<8> num;
> - let Inst = num;
> -}
> -
> def FETCH_CLAUSE : AMDGPUInst <(outs),
> (ins i32imm:$addr), "Fetch clause starting at $addr:", [] > {
> field bits<8> Inst;
> diff --git a/lib/Target/R600/R600MachineFunctionInfo.h b/lib/Target/R600/R600MachineFunctionInfo.h
> index 99c1f91..70fddbb 100644
> --- a/lib/Target/R600/R600MachineFunctionInfo.h
> +++ b/lib/Target/R600/R600MachineFunctionInfo.h
> @@ -25,6 +25,7 @@ public:
> R600MachineFunctionInfo(const MachineFunction &MF);
> SmallVector<unsigned, 4> LiveOuts;
> std::vector<unsigned> IndirectRegs;
> + unsigned StackSize;
> };
>
> } // End llvm namespace
> diff --git a/test/CodeGen/R600/elf.r600.ll b/test/CodeGen/R600/elf.r600.ll
> new file mode 100644
> index 0000000..9dbc0af
> --- /dev/null
> +++ b/test/CodeGen/R600/elf.r600.ll
> @@ -0,0 +1,15 @@
> +; RUN: llc < %s -march=r600 -mcpu=redwood -filetype=obj | llvm-readobj -s - | FileCheck --check-prefix=ELF-CHECK %s
> +; RUN: llc < %s -march=r600 -mcpu=redwood -o - | FileCheck --check-prefix=CONFIG-CHECK %s
> +
> +; ELF-CHECK: Format: ELF32
> +; ELF-CHECK: Name: .AMDGPU.config
> +
> +; CONFIG-CHECK: .section .AMDGPU.config
> +; CONFIG-CHECK-NEXT: .long 2
> +; CONFIG-CHECK-NEXT: .long 1
> +define void @test(float addrspace(1)* %out, i32 %p) {
> + %i = add i32 %p, 2
> + %r = bitcast i32 %i to float
> + store float %r, float addrspace(1)* %out
> + ret void
> +}
> --
> 1.8.1.4
>
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