[llvm] r179544 - R600: Emit ELF formatted code rather than raw ISA.
Tom Stellard
thomas.stellard at amd.com
Mon Apr 15 10:51:21 PDT 2013
Author: tstellar
Date: Mon Apr 15 12:51:21 2013
New Revision: 179544
URL: http://llvm.org/viewvc/llvm-project?rev=179544&view=rev
Log:
R600: Emit ELF formatted code rather than raw ISA.
Added:
llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUELFObjectWriter.cpp
llvm/trunk/test/CodeGen/R600/elf.ll
Modified:
llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp
llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp
llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h
llvm/trunk/lib/Target/R600/MCTargetDesc/CMakeLists.txt
Modified: llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp?rev=179544&r1=179543&r2=179544&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp (original)
+++ llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp Mon Apr 15 12:51:21 2013
@@ -44,7 +44,6 @@ public:
AMDGPUAsmBackend(const Target &T)
: MCAsmBackend() {}
- virtual AMDGPUMCObjectWriter *createObjectWriter(raw_ostream &OS) const;
virtual unsigned getNumFixupKinds() const { return 0; };
virtual void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
uint64_t Value) const;
@@ -71,16 +70,6 @@ void AMDGPUMCObjectWriter::WriteObject(M
}
}
-MCAsmBackend *llvm::createAMDGPUAsmBackend(const Target &T, StringRef TT,
- StringRef CPU) {
- return new AMDGPUAsmBackend(T);
-}
-
-AMDGPUMCObjectWriter * AMDGPUAsmBackend::createObjectWriter(
- raw_ostream &OS) const {
- return new AMDGPUMCObjectWriter(OS);
-}
-
void AMDGPUAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,
unsigned DataSize, uint64_t Value) const {
@@ -88,3 +77,21 @@ void AMDGPUAsmBackend::applyFixup(const
assert(Fixup.getKind() == FK_PCRel_4);
*Dst = (Value - 4) / 4;
}
+
+//===----------------------------------------------------------------------===//
+// ELFAMDGPUAsmBackend class
+//===----------------------------------------------------------------------===//
+
+class ELFAMDGPUAsmBackend : public AMDGPUAsmBackend {
+public:
+ ELFAMDGPUAsmBackend(const Target &T) : AMDGPUAsmBackend(T) { }
+
+ MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
+ return createAMDGPUELFObjectWriter(OS);
+ }
+};
+
+MCAsmBackend *llvm::createAMDGPUAsmBackend(const Target &T, StringRef TT,
+ StringRef CPU) {
+ return new ELFAMDGPUAsmBackend(T);
+}
Added: llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUELFObjectWriter.cpp?rev=179544&view=auto
==============================================================================
--- llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUELFObjectWriter.cpp (added)
+++ llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUELFObjectWriter.cpp Mon Apr 15 12:51:21 2013
@@ -0,0 +1,39 @@
+//===-- AMDGPUELFObjectWriter.cpp - AMDGPU ELF Writer ----------------------==//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+/// \file
+//===----------------------------------------------------------------------===//
+
+#include "AMDGPUMCTargetDesc.h"
+#include "llvm/MC/MCELFObjectWriter.h"
+
+using namespace llvm;
+
+namespace {
+
+class AMDGPUELFObjectWriter : public MCELFObjectTargetWriter {
+public:
+ AMDGPUELFObjectWriter();
+protected:
+ virtual unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,
+ bool IsPCRel, bool IsRelocWithSymbol,
+ int64_t Addend) const {
+ llvm_unreachable("Not implemented");
+ }
+
+};
+
+
+} // End anonymous namespace
+
+AMDGPUELFObjectWriter::AMDGPUELFObjectWriter()
+ : MCELFObjectTargetWriter(false, 0, 0, false) { }
+
+MCObjectWriter *llvm::createAMDGPUELFObjectWriter(raw_ostream &OS) {
+ MCELFObjectTargetWriter *MOTW = new AMDGPUELFObjectWriter();
+ return createELFObjectWriter(MOTW, OS, true);
+}
Modified: llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp?rev=179544&r1=179543&r2=179544&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp Mon Apr 15 12:51:21 2013
@@ -88,7 +88,7 @@ static MCStreamer *createMCStreamer(cons
MCCodeEmitter *_Emitter,
bool RelaxAll,
bool NoExecStack) {
- return createPureStreamer(Ctx, MAB, _OS, _Emitter);
+ return createELFStreamer(Ctx, MAB, _OS, _Emitter, false, false);
}
extern "C" void LLVMInitializeR600TargetMC() {
Modified: llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h?rev=179544&r1=179543&r2=179544&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h (original)
+++ llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h Mon Apr 15 12:51:21 2013
@@ -23,9 +23,11 @@ class MCAsmBackend;
class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
+class MCObjectWriter;
class MCRegisterInfo;
class MCSubtargetInfo;
class Target;
+class raw_ostream;
extern Target TheAMDGPUTarget;
@@ -41,6 +43,8 @@ MCCodeEmitter *createSIMCCodeEmitter(con
MCAsmBackend *createAMDGPUAsmBackend(const Target &T, StringRef TT,
StringRef CPU);
+
+MCObjectWriter *createAMDGPUELFObjectWriter(raw_ostream &OS);
} // End llvm namespace
#define GET_REGINFO_ENUM
Modified: llvm/trunk/lib/Target/R600/MCTargetDesc/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/MCTargetDesc/CMakeLists.txt?rev=179544&r1=179543&r2=179544&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/MCTargetDesc/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/R600/MCTargetDesc/CMakeLists.txt Mon Apr 15 12:51:21 2013
@@ -1,6 +1,7 @@
add_llvm_library(LLVMR600Desc
AMDGPUAsmBackend.cpp
+ AMDGPUELFObjectWriter.cpp
AMDGPUMCTargetDesc.cpp
AMDGPUMCAsmInfo.cpp
R600MCCodeEmitter.cpp
Added: llvm/trunk/test/CodeGen/R600/elf.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/elf.ll?rev=179544&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/R600/elf.ll (added)
+++ llvm/trunk/test/CodeGen/R600/elf.ll Mon Apr 15 12:51:21 2013
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=r600 -mcpu=SI -filetype=obj | llvm-readobj -s - | FileCheck %s
+
+; CHECK: Format: ELF32
+define void @test(i32 %p) {
+ %i = add i32 %p, 2
+ %r = bitcast i32 %i to float
+ call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %r, float %r, float %r, float %r)
+ ret void
+}
+
+declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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