[llvm] r179494 - Use object file specific section type for initial text section

Tom Stellard tom at stellard.net
Mon Apr 15 08:51:48 PDT 2013


Hi Nico,

This commit causes an assertion failure when compiling object files on
the R600 target.  However, I am just minutes away from pushing commits
that switch R600 from using the PureStreamer to using the ELFStreamer and
everything works fine when we use the ELFStreamer.  So, fixing this is not
critical, but I thought you would be interested in how to reproduce this,
in case other users run into a similar problem.

With the checkout r179494 I get the assertion failure:

/home/tstellar/llvm/include/llvm/MC/MCStreamer.h:224:
void llvm::MCStreamer::SwitchSection(const llvm::MCSection *): Assertion
`Section && "Cannot switch to a null section!"' failed.

You can reproduce this by trying to compile one of the lit tests to an
object file:

llc -march=r600 -mcpu=SI llvm/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll -o -
-filetype=obj

As I mentioned before, you won't be able to reproduce this with newer
versions of LLVM once we have switched to the ELFStreamer.

-Tom

On Sun, Apr 14, 2013 at 09:18:37PM -0000, Nico Rieck wrote:
> Author: nrieck
> Date: Sun Apr 14 16:18:36 2013
> New Revision: 179494
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=179494&view=rev
> Log:
> Use object file specific section type for initial text section
> 
> Modified:
>     llvm/trunk/lib/MC/MCAsmStreamer.cpp
>     llvm/trunk/lib/MC/MCPureStreamer.cpp
>     llvm/trunk/test/MC/Disassembler/Mips/mips32.txt
>     llvm/trunk/test/MC/Disassembler/Mips/mips32_le.txt
>     llvm/trunk/test/MC/Disassembler/Mips/mips32r2.txt
>     llvm/trunk/test/MC/Disassembler/Mips/mips32r2_le.txt
>     llvm/trunk/test/MC/Disassembler/Mips/mips64.txt
>     llvm/trunk/test/MC/Disassembler/Mips/mips64_le.txt
>     llvm/trunk/test/MC/Disassembler/Mips/mips64r2.txt
>     llvm/trunk/test/MC/Disassembler/Mips/mips64r2_le.txt
>     llvm/trunk/test/MC/Disassembler/XCore/xcore.txt
>     llvm/trunk/test/MC/Mips/mips-alu-instructions.s
>     llvm/trunk/test/MC/Mips/mips-expansions.s
>     llvm/trunk/test/MC/Mips/mips-fpu-instructions.s
>     llvm/trunk/test/MC/Mips/mips-jump-instructions.s
>     llvm/trunk/test/MC/Mips/mips-memory-instructions.s
>     llvm/trunk/test/MC/Mips/mips-relocations.s
>     llvm/trunk/test/MC/Mips/mips64-alu-instructions.s
>     llvm/trunk/test/MC/Mips/nabi-regs.s
>     llvm/trunk/test/MC/Mips/set-at-directive.s
> 
> Modified: llvm/trunk/lib/MC/MCAsmStreamer.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAsmStreamer.cpp?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/lib/MC/MCAsmStreamer.cpp (original)
> +++ llvm/trunk/lib/MC/MCAsmStreamer.cpp Sun Apr 14 16:18:36 2013
> @@ -131,12 +131,7 @@ public:
>    }
>  
>    virtual void InitToTextSection() {
> -    // FIXME, this is MachO specific, but the testsuite
> -    // expects this.
> -    SwitchSection(getContext().getMachOSection(
> -                                      "__TEXT", "__text",
> -                                      MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
> -                                      0, SectionKind::getText()));
> +    SwitchSection(getContext().getObjectFileInfo()->getTextSection());
>    }
>  
>    virtual void EmitLabel(MCSymbol *Symbol);
> 
> Modified: llvm/trunk/lib/MC/MCPureStreamer.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCPureStreamer.cpp?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/lib/MC/MCPureStreamer.cpp (original)
> +++ llvm/trunk/lib/MC/MCPureStreamer.cpp Sun Apr 14 16:18:36 2013
> @@ -12,9 +12,8 @@
>  #include "llvm/MC/MCCodeEmitter.h"
>  #include "llvm/MC/MCContext.h"
>  #include "llvm/MC/MCExpr.h"
> +#include "llvm/MC/MCObjectFileInfo.h"
>  #include "llvm/MC/MCObjectStreamer.h"
> -// FIXME: Remove this.
> -#include "llvm/MC/MCSectionMachO.h"
>  #include "llvm/MC/MCSymbol.h"
>  #include "llvm/Support/ErrorHandling.h"
>  
> @@ -113,10 +112,7 @@ void MCPureStreamer::InitSections() {
>  }
>  
>  void MCPureStreamer::InitToTextSection() {
> -  // FIMXE: To what!?
> -  SwitchSection(getContext().getMachOSection("__TEXT", "__text",
> -                                    MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
> -                                    0, SectionKind::getText()));
> +  SwitchSection(getContext().getObjectFileInfo()->getTextSection());
>  }
>  
>  void MCPureStreamer::EmitLabel(MCSymbol *Symbol) {
> 
> Modified: llvm/trunk/test/MC/Disassembler/Mips/mips32.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips32.txt?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Disassembler/Mips/mips32.txt (original)
> +++ llvm/trunk/test/MC/Disassembler/Mips/mips32.txt Sun Apr 14 16:18:36 2013
> @@ -1,5 +1,4 @@
>  # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux | FileCheck %s
> -# CHECK: .section        __TEXT,__text,regular,pure_instructions
>  # CHECK: abs.d $f12, $f14
>  0x46 0x20 0x73 0x05
>  
> 
> Modified: llvm/trunk/test/MC/Disassembler/Mips/mips32_le.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips32_le.txt?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Disassembler/Mips/mips32_le.txt (original)
> +++ llvm/trunk/test/MC/Disassembler/Mips/mips32_le.txt Sun Apr 14 16:18:36 2013
> @@ -1,5 +1,4 @@
>  # RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux | FileCheck %s
> -# CHECK: .section        __TEXT,__text,regular,pure_instructions
>  # CHECK: abs.d $f12, $f14
>  0x05 0x73 0x20 0x46
>  
> 
> Modified: llvm/trunk/test/MC/Disassembler/Mips/mips32r2.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips32r2.txt?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Disassembler/Mips/mips32r2.txt (original)
> +++ llvm/trunk/test/MC/Disassembler/Mips/mips32r2.txt Sun Apr 14 16:18:36 2013
> @@ -1,5 +1,4 @@
>  # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 | FileCheck %s
> -# CHECK: .section        __TEXT,__text,regular,pure_instructions
>  # CHECK: abs.d $f12, $f14
>  0x46 0x20 0x73 0x05
>  
> 
> Modified: llvm/trunk/test/MC/Disassembler/Mips/mips32r2_le.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips32r2_le.txt?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Disassembler/Mips/mips32r2_le.txt (original)
> +++ llvm/trunk/test/MC/Disassembler/Mips/mips32r2_le.txt Sun Apr 14 16:18:36 2013
> @@ -1,5 +1,4 @@
>  # RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux -mcpu=mips32r2 | FileCheck %s
> -# CHECK: .section        __TEXT,__text,regular,pure_instructions
>  # CHECK: abs.d $f12, $f14
>  0x05 0x73 0x20 0x46
>  
> 
> Modified: llvm/trunk/test/MC/Disassembler/Mips/mips64.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips64.txt?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Disassembler/Mips/mips64.txt (original)
> +++ llvm/trunk/test/MC/Disassembler/Mips/mips64.txt Sun Apr 14 16:18:36 2013
> @@ -1,5 +1,4 @@
>  # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux | FileCheck %s
> -# CHECK: .section	 __TEXT,__text,regular,pure_instructions
>  # CHECK: daddiu $11, $26, 31949
>  0x67 0x4b 0x7c 0xcd
>  
> 
> Modified: llvm/trunk/test/MC/Disassembler/Mips/mips64_le.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips64_le.txt?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Disassembler/Mips/mips64_le.txt (original)
> +++ llvm/trunk/test/MC/Disassembler/Mips/mips64_le.txt Sun Apr 14 16:18:36 2013
> @@ -1,5 +1,4 @@
>  # RUN: llvm-mc --disassemble %s -triple=mips64el-unknown-linux | FileCheck %s
> -# CHECK: .section	 __TEXT,__text,regular,pure_instructions
>  # CHECK: daddiu $11, $26, 31949
>  0xcd 0x7c 0x4b 0x67
>  
> 
> Modified: llvm/trunk/test/MC/Disassembler/Mips/mips64r2.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips64r2.txt?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Disassembler/Mips/mips64r2.txt (original)
> +++ llvm/trunk/test/MC/Disassembler/Mips/mips64r2.txt Sun Apr 14 16:18:36 2013
> @@ -1,5 +1,4 @@
>  # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mattr +mips64r2 | FileCheck %s
> -# CHECK: .section	 __TEXT,__text,regular,pure_instructions
>  # CHECK: daddiu $11, $26, 31949
>  0x67 0x4b 0x7c 0xcd
>  
> 
> Modified: llvm/trunk/test/MC/Disassembler/Mips/mips64r2_le.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips64r2_le.txt?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Disassembler/Mips/mips64r2_le.txt (original)
> +++ llvm/trunk/test/MC/Disassembler/Mips/mips64r2_le.txt Sun Apr 14 16:18:36 2013
> @@ -1,5 +1,4 @@
>  # RUN: llvm-mc --disassemble %s -triple=mips64el-unknown-linux -mattr +mips64r2 | FileCheck %s
> -# CHECK: .section	 __TEXT,__text,regular,pure_instructions
>  # CHECK: daddiu $11, $26, 31949
>  0xcd 0x7c 0x4b 0x67
>  
> 
> Modified: llvm/trunk/test/MC/Disassembler/XCore/xcore.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/XCore/xcore.txt?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Disassembler/XCore/xcore.txt (original)
> +++ llvm/trunk/test/MC/Disassembler/XCore/xcore.txt Sun Apr 14 16:18:36 2013
> @@ -1,5 +1,4 @@
>  # RUN: llvm-mc --disassemble %s -triple=xcore-xmos-elf | FileCheck %s
> -# CHECK: .section        __TEXT,__text,regular,pure_instructions
>  
>  # 0r instructions
>  
> 
> Modified: llvm/trunk/test/MC/Mips/mips-alu-instructions.s
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips-alu-instructions.s?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Mips/mips-alu-instructions.s (original)
> +++ llvm/trunk/test/MC/Mips/mips-alu-instructions.s Sun Apr 14 16:18:36 2013
> @@ -1,7 +1,6 @@
>  # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
>  # Check that the assembler can handle the documented syntax
>  # for arithmetic and logical instructions.
> -# CHECK: .section __TEXT,__text,regular,pure_instructions
>  #------------------------------------------------------------------------------
>  # Logical instructions
>  #------------------------------------------------------------------------------
> 
> Modified: llvm/trunk/test/MC/Mips/mips-expansions.s
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips-expansions.s?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Mips/mips-expansions.s (original)
> +++ llvm/trunk/test/MC/Mips/mips-expansions.s Sun Apr 14 16:18:36 2013
> @@ -1,7 +1,6 @@
>  # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
>  # Check that the assembler can handle the documented syntax
>  # for macro instructions
> -# CHECK: .section __TEXT,__text,regular,pure_instructions
>  #------------------------------------------------------------------------------
>  # Load immediate instructions
>  #------------------------------------------------------------------------------
> 
> Modified: llvm/trunk/test/MC/Mips/mips-fpu-instructions.s
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips-fpu-instructions.s?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Mips/mips-fpu-instructions.s (original)
> +++ llvm/trunk/test/MC/Mips/mips-fpu-instructions.s Sun Apr 14 16:18:36 2013
> @@ -1,7 +1,6 @@
>  # RUN: llvm-mc  %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
>  # Check that the assembler can handle the documented syntax
>  # for FPU instructions.
> -# CHECK: .section __TEXT,__text,regular,pure_instructions
>  #------------------------------------------------------------------------------
>  # FP aritmetic  instructions
>  #------------------------------------------------------------------------------
> 
> Modified: llvm/trunk/test/MC/Mips/mips-jump-instructions.s
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips-jump-instructions.s?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Mips/mips-jump-instructions.s (original)
> +++ llvm/trunk/test/MC/Mips/mips-jump-instructions.s Sun Apr 14 16:18:36 2013
> @@ -2,7 +2,6 @@
>  # RUN: FileCheck %s
>  # Check that the assembler can handle the documented syntax
>  # for jumps and branches.
> -# CHECK: .section __TEXT,__text,regular,pure_instructions
>  #------------------------------------------------------------------------------
>  # Branch instructions
>  #------------------------------------------------------------------------------
> 
> Modified: llvm/trunk/test/MC/Mips/mips-memory-instructions.s
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips-memory-instructions.s?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Mips/mips-memory-instructions.s (original)
> +++ llvm/trunk/test/MC/Mips/mips-memory-instructions.s Sun Apr 14 16:18:36 2013
> @@ -1,7 +1,6 @@
>  # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
>  # Check that the assembler can handle the documented syntax
>  # for loads and stores.
> -# CHECK: .section __TEXT,__text,regular,pure_instructions
>  #------------------------------------------------------------------------------
>  # Memory store instructions
>  #------------------------------------------------------------------------------
> 
> Modified: llvm/trunk/test/MC/Mips/mips-relocations.s
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips-relocations.s?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Mips/mips-relocations.s (original)
> +++ llvm/trunk/test/MC/Mips/mips-relocations.s Sun Apr 14 16:18:36 2013
> @@ -1,7 +1,6 @@
>  # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
>  # Check that the assembler can handle the documented syntax
>  # for relocations.
> -# CHECK: .section __TEXT,__text,regular,pure_instructions
>  # CHECK:  lui   $2, %hi(_gp_disp)     # encoding: [A,A,0x02,0x3c]
>  # CHECK:                              #   fixup A - offset: 0, value: _gp_disp at ABS_HI, kind: fixup_Mips_HI16
>  # CHECK:  addiu $2, $2, %lo(_gp_disp) # encoding: [A,A,0x42,0x24]
> 
> Modified: llvm/trunk/test/MC/Mips/mips64-alu-instructions.s
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips64-alu-instructions.s?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Mips/mips64-alu-instructions.s (original)
> +++ llvm/trunk/test/MC/Mips/mips64-alu-instructions.s Sun Apr 14 16:18:36 2013
> @@ -1,7 +1,6 @@
>  # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips64r2 | FileCheck %s
>  # Check that the assembler can handle the documented syntax
>  # for arithmetic and logical instructions.
> -# CHECK: .section __TEXT,__text,regular,pure_instructions
>  #------------------------------------------------------------------------------
>  # Logical instructions
>  #------------------------------------------------------------------------------
> 
> Modified: llvm/trunk/test/MC/Mips/nabi-regs.s
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/nabi-regs.s?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Mips/nabi-regs.s (original)
> +++ llvm/trunk/test/MC/Mips/nabi-regs.s Sun Apr 14 16:18:36 2013
> @@ -8,7 +8,6 @@
>  # RUN: -mcpu=mips64r2 -arch=mips64 | \
>  # RUN: FileCheck %s
>  
> -# CHECK: .section    __TEXT,__text,regular,pure_instructions
>      .text
>  foo:
>  
> 
> Modified: llvm/trunk/test/MC/Mips/set-at-directive.s
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/set-at-directive.s?rev=179494&r1=179493&r2=179494&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Mips/set-at-directive.s (original)
> +++ llvm/trunk/test/MC/Mips/set-at-directive.s Sun Apr 14 16:18:36 2013
> @@ -3,7 +3,6 @@
>  # Check that the assembler can handle the documented syntax
>  # for ".set at" and set the correct value.
>  
> -# CHECK: .section __TEXT,__text,regular,pure_instructions
>      .text
>  foo:
>  # CHECK:   jr    $1                      # encoding: [0x08,0x00,0x20,0x00]
> 
> 
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