[llvm] r179223 - fixed xsave, xsaveopt, xrstor mnemonics with intel syntax; added test cases

[Kay Tiong Khoo]

Author: kkhoo
Date: Wed Apr 10 16:52:25 2013
New Revision: 179223

URL: http://llvm.org/viewvc/llvm-project?rev=179223&view=rev
Log:
fixed xsave, xsaveopt, xrstor mnemonics with intel syntax; added test cases

Modified:
    llvm/trunk/lib/Target/X86/X86InstrSystem.td
    llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt
    llvm/trunk/test/MC/Disassembler/X86/x86-64.txt

Modified: llvm/trunk/lib/Target/X86/X86InstrSystem.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSystem.td?rev=179223&r1=179222&r2=179223&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSystem.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSystem.td Wed Apr 10 16:52:25 2013
@@ -449,15 +449,15 @@ let Uses = [RDX, RAX] in {
   def XSAVE : I<0xAE, MRM4m, (outs opaque512mem:$dst), (ins),
                "xsave\t$dst", []>, TB;
   def XSAVE64 : I<0xAE, MRM4m, (outs opaque512mem:$dst), (ins),
-                 "xsaveq\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>;
+                 "xsave{q|64}\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>;
   def XRSTOR : I<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
                "xrstor\t$dst", []>, TB;
   def XRSTOR64 : I<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
-                 "xrstorq\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>;
+                 "xrstor{q|64}\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>;
   def XSAVEOPT : I<0xAE, MRM6m, (outs opaque512mem:$dst), (ins),
                   "xsaveopt\t$dst", []>, TB;
   def XSAVEOPT64 : I<0xAE, MRM6m, (outs opaque512mem:$dst), (ins),
-                    "xsaveoptq\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>;
+                    "xsaveopt{q|64}\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>;
 }
 } // SchedRW
 

Modified: llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt?rev=179223&r1=179222&r2=179223&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt (original)
+++ llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt Wed Apr 10 16:52:25 2013
@@ -110,3 +110,12 @@
 
 # CHECK: vpgatherdd XMM10, DWORD PTR [R15 + 2*XMM9], XMM8
 0xc4 0x02 0x39 0x90 0x14 0x4f
+
+# CHECK: xsave64 OPAQUE PTR [RAX]
+0x48 0x0f 0xae 0x20
+
+# CHECK: xrstor64 OPAQUE PTR [RAX]
+0x48 0x0f 0xae 0x28
+
+# CHECK: xsaveopt64 OPAQUE PTR [RAX]
+0x48 0x0f 0xae 0x30

Modified: llvm/trunk/test/MC/Disassembler/X86/x86-64.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/x86-64.txt?rev=179223&r1=179222&r2=179223&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/x86-64.txt (original)
+++ llvm/trunk/test/MC/Disassembler/X86/x86-64.txt Wed Apr 10 16:52:25 2013
@@ -112,3 +112,12 @@
 
 # CHECK: xabort $13
 0xc6 0xf8 0x0d
+
+# CHECK: xsaveq (%rax)
+0x48 0x0f 0xae 0x20
+
+# CHECK: xrstorq (%rax)
+0x48 0x0f 0xae 0x28
+
+# CHECK: xsaveoptq (%rax)
+0x48 0x0f 0xae 0x30