[llvm] r179026 - Generate PPC early conditional returns

[Hal Finkel]

----- Original Message -----
> From: "Hal Finkel" <hfinkel at anl.gov>
> To: "Evan Cheng" <evan.cheng at apple.com>
> Cc: llvm-commits at cs.uiuc.edu
> Sent: Tuesday, April 9, 2013 6:13:25 PM
> Subject: Re: [llvm] r179026 - Generate PPC early conditional returns
> 
> ----- Original Message -----
> > From: "Evan Cheng" <evan.cheng at apple.com>
> > To: "Hal Finkel" <hfinkel at anl.gov>
> > Cc: "Chris Lattner" <clattner at apple.com>, llvm-commits at cs.uiuc.edu
> > Sent: Tuesday, April 9, 2013 10:53:28 AM
> > Subject: Re: [llvm] r179026 - Generate PPC early conditional
> > returns
> > 
> > 
> > 
> > Sent from my iPad
> > 
> > On Apr 8, 2013, at 10:09 PM, Hal Finkel <hfinkel at anl.gov> wrote:
> > 
> > > ----- Original Message -----
> > >> From: "Chris Lattner" <clattner at apple.com>
> > >> To: "Hal Finkel" <hfinkel at anl.gov>
> > >> Cc: llvm-commits at cs.uiuc.edu
> > >> Sent: Monday, April 8, 2013 8:04:17 PM
> > >> Subject: Re: [llvm] r179026 - Generate PPC early conditional
> > >> returns
> > >> 
> > >> 
> > >> On Apr 8, 2013, at 9:24 AM, Hal Finkel <hfinkel at anl.gov> wrote:
> > >> 
> > >>> Author: hfinkel
> > >>> Date: Mon Apr  8 11:24:03 2013
> > >>> New Revision: 179026
> > >>> 
> > >>> URL: http://llvm.org/viewvc/llvm-project?rev=179026&view=rev
> > >>> Log:
> > >>> Generate PPC early conditional returns
> > >>> 
> > >>> PowerPC has a conditional branch to the link register (return)
> > >>> instruction: BCLR.
> > >>> This should be used any time when we'd otherwise have a
> > >>> conditional
> > >>> branch to a
> > >>> return. This adds a small pass, PPCEarlyReturn, which runs just
> > >>> prior to the
> > >>> branch selection pass (and, importantly, after block placement)
> > >>> to
> > >>> generate
> > >>> these conditional returns when possible. It will also eliminate
> > >>> unconditional
> > >>> branches to returns (these happen rarely; most of the time
> > >>> these
> > >>> have already
> > >>> been tail duplicated by the time PPCEarlyReturn is invoked).
> > >>> This
> > >>> is a nice
> > >>> optimization for small functions that do not maintain a stack
> > >>> frame.
> > >> 
> > >> Hi Hal,
> > >> 
> > >> Should this just be a special case of general predication/if
> > >> conversion?
> > > 
> > > It seems like it should be, but I'm not sure. The regular if
> > > conversion pass is generally added in addPreSched2, which is
> > > after
> > > epilogue generation, and so it could work. When I looked through
> > > the source to IfConversion.cpp, it did not seem like it would
> > > have
> > > supported this transformation. IfConversion seems to be looking
> > > for blocks to predicate in between the conditional branch and the
> > > common successor, and not specifically concerned with tail
> > > merging
> > > a predicated common successor into the common predecessor;
> > > something which may only make sense if the common sucessor is a
> > > return). This may really be more of a peephole-style optimization
> > > than a predication optimization. Evan?
> > > 
> > 
> > It may require some work to get it right for this case but the if
> > converter does generate conditional returns.
> 
> I committed some initial support in r179134. Thanks for the
> suggestion!
> 
> At present, if conversion alone does not find all of the cases that
> PPCEarlyReturn finds (I included a simple test case in the commit),
> but of course find others, so the largest win currently is to keep
> both.
> 
> Next is:
> 
>  - If conversion sometimes seems not to remove blocks from the
>  successors list when they no longer are successors, causing some
>  dead return-only blocks in the resulting code. I'll see if I can
>  fix this.
> 
>  - If conversion currently assumes a boolean ability to predicate;
>  for PPC, this is not true. Some branches can take all kinds of
>  predicates, but some can only take certain kinds. Also, some
>  branches can take multiple predicates (one from each class). Maybe
>  isPredicable could be extended to take a Pred array?

Thinking about it; I'll see how far I can get with the current setup. The second class of predicates is related to decrementing-and-testing the counter register. One thing about which I'll need to be careful about when combining both classes is: Even if the condition-register predicate is false, the counter register is still decremented, and so I need to make sure that the condition-register decrementing is not duplicated along any one control-flow path.

 -Hal

> 
> Thanks again,
> Hal
> 
> > 
> > Evan
> > 
> > > -Hal
> > > 
> > >> 
> > >> -Chris
> > >> 
> > 
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