[llvm] r178636 - Second pass at addressing PR15351 by explicitly checking for AVX support

[Aaron Ballman]

Resolved in r178674, thanks!

~Aaron

On Wed, Apr 3, 2013 at 12:45 PM, Craig Topper <craig.topper at gmail.com> wrote:
> Also shouldn't this
>
> bool HasAVX = (ECX & ((1 << 28) | (1 << 27))) != 0 && OSHasAVXSupport();
>
> be
>
> bool HasAVX = (ECX & ((1 << 28) | (1 << 27))) == ((1 << 28) | (1 << 27)) &&
> OSHasAVXSupport();
>
> Or variation so that it really checks that both bits are set not that some
> combination of the two bits is set.
>
>
> On Wed, Apr 3, 2013 at 9:23 AM, Aaron Ballman <aaron at aaronballman.com>
> wrote:
>>
>> The documentation was unclear on this, but I think you're right that
>> it's only in SP1.  I'll update the code to reflect that, good catch!
>>
>> ~Aaron
>>
>> On Wed, Apr 3, 2013 at 12:14 PM, Craig Topper <craig.topper at gmail.com>
>> wrote:
>> > Isn't _xgetbv only supported by MSVC 2010 SP1? Shouldn't this be
>> > checking
>> > that you're using at least that MSVC version?
>> >
>> >
>> > On Wed, Apr 3, 2013 at 5:25 AM, Aaron Ballman <aaron at aaronballman.com>
>> > wrote:
>> >>
>> >> Author: aaronballman
>> >> Date: Wed Apr  3 07:25:06 2013
>> >> New Revision: 178636
>> >>
>> >> URL: http://llvm.org/viewvc/llvm-project?rev=178636&view=rev
>> >> Log:
>> >> Second pass at addressing PR15351 by explicitly checking for AVX
>> >> support
>> >> when getting the host processor information.  It emits a .byte sequence
>> >> on
>> >> GNUC compilers to work around lack of xgetbv support with older
>> >> assemblers,
>> >> and resolves a comment typo found in the previous patch.
>> >>
>> >> Modified:
>> >>     llvm/trunk/lib/Support/Host.cpp
>> >>
>> >> Modified: llvm/trunk/lib/Support/Host.cpp
>> >> URL:
>> >>
>> >> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Host.cpp?rev=178636&r1=178635&r2=178636&view=diff
>> >>
>> >>
>> >> ==============================================================================
>> >> --- llvm/trunk/lib/Support/Host.cpp (original)
>> >> +++ llvm/trunk/lib/Support/Host.cpp Wed Apr  3 07:25:06 2013
>> >> @@ -112,6 +112,21 @@ static bool GetX86CpuIDAndInfo(unsigned
>> >>  #endif
>> >>  }
>> >>
>> >> +static bool OSHasAVXSupport() {
>> >> +#if defined( __GNUC__ )
>> >> +  // Check xgetbv; this uses a .byte sequence instead of the
>> >> instruction
>> >> +  // directly because older assemblers do not include support for
>> >> xgetbv
>> >> and
>> >> +  // there is no easy way to conditionally compile based on the
>> >> assembler
>> >> used.
>> >> +  int rEAX, rEDX;
>> >> +  __asm__ (".byte 0x0f, 0x01, 0xd0" : "=a" (rEAX), "=d" (rEDX) : "c"
>> >> (0));
>> >> +#elif defined(_MSC_VER)
>> >> +  unsigned long long rEAX = _xgetbv(_XCR_XFEATURE_ENABLED_MASK);
>> >> +#else
>> >> +  int rEAX = 0; // Ensures we return false
>> >> +#endif
>> >> +  return (rEAX & 6) == 6;
>> >> +}
>> >> +
>> >>  static void DetectX86FamilyModel(unsigned EAX, unsigned &Family,
>> >>                                   unsigned &Model) {
>> >>    Family = (EAX >> 8) & 0xf; // Bits 8 - 11
>> >> @@ -134,6 +149,10 @@ std::string sys::getHostCPUName() {
>> >>    DetectX86FamilyModel(EAX, Family, Model);
>> >>
>> >>    bool HasSSE3 = (ECX & 0x1);
>> >> +  // If CPUID indicates support for XSAVE, XRESTORE and AVX, and
>> >> XGETBV
>> >> +  // indicates that the AVX registers will be saved and restored on
>> >> context
>> >> +  // switch, then we have full AVX support.
>> >> +  bool HasAVX = (ECX & ((1 << 28) | (1 << 27))) != 0 &&
>> >> OSHasAVXSupport();
>> >>    GetX86CpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
>> >>    bool Em64T = (EDX >> 29) & 0x1;
>> >>
>> >> @@ -243,11 +262,15 @@ std::string sys::getHostCPUName() {
>> >>        case 42: // Intel Core i7 processor. All processors are
>> >> manufactured
>> >>                 // using the 32 nm process.
>> >>        case 45:
>> >> -        return "corei7-avx";
>> >> +        // Not all Sandy Bridge processors support AVX (such as the
>> >> Pentium
>> >> +        // versions instead of the i7 versions).
>> >> +        return HasAVX ? "corei7-avx" : "corei7";
>> >>
>> >>        // Ivy Bridge:
>> >>        case 58:
>> >> -        return "core-avx-i";
>> >> +        // Not all Ivy Bridge processors support AVX (such as the
>> >> Pentium
>> >> +        // versions instead of the i7 versions).
>> >> +        return HasAVX ? "core-avx-i" : "corei7";
>> >>
>> >>        case 28: // Most 45 nm Intel Atom processors
>> >>        case 38: // 45 nm Atom Lincroft
>> >>
>> >>
>> >> _______________________________________________
>> >> llvm-commits mailing list
>> >> llvm-commits at cs.uiuc.edu
>> >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>> >
>> >
>> >
>> >
>> > --
>> > ~Craig
>
>
>
>
> --
> ~Craig