[llvm] r178058 - Update PEI's virtual-register-based scavenging to support multiple simultaneous mappings

[Pranav Bhandarkar]

Hi Hal,

       }
-      RS->forward(I);
-      ++I;
+
+      // If the scavenger needed to use one of its spill slots, the
+      // spill code will have been inserted in between I and J. This is a
+      // problem because we need the spill code before I: Move I to just
+      // prior to J.
+      if (I != llvm::prior(J)) {
+        BB->splice(J, BB, I++);
+        RS->skipTo(I == BB->begin() ? NULL : llvm::prior(I));
+      } else
+        ++I;

I think there is a problem with the above. Suppose RS had to use one of 
its spill slots, then the new spill instruction, say A, is now between I 
and J and we move I to just after A. So, now, prior(I) is A and we begin 
processing again from A. However, if I, which RS has already processed 
was killing a register, then that register, say Rx is now available. 
After A, when we process I again the RS asserts because a use of Rx is 
found when Rx is available (seemingly, a use without a def).

This is the signature of the error.

Using an undefined register!
UNREACHABLE executed at 
/prj/dsp/austin/llvm/test/users/qneill/build/hexagon/llvm-DUI_main_2013_03_28-8bbaf6c-clang-DUI_main_2013_03_28-9dfb83b-polly-DUI_main_2013_03_28-83b2727/lib/CodeGen/RegisterScavenging.cpp:220!

Let me elaborate,
(This is on Hexagon)

  %vreg2<def> = TFR_RsPd %P2<kill>; IntRegs:%vreg2         <<- (I)
   STriw_indexed %R29, 52, %vreg2<kill>; mem:ST4[FixedStack20] 
IntRegs:%vreg2 <<-- (J).

After RS->forward(I), %P2 is available. After asking the scavenger for a 
register for %vreg2, we get

   %R6<def> = TFR_RsPd %P2<kill>         <<- (I)
    STriw_indexed %R29, 436, %R6<kill>; mem:ST4[FixedStack32] <<-- (A)
    STriw_indexed %R29, 52, %R6<kill>; mem:ST4[FixedStack20] <<-- (J)

We then move I before J and resume from (A) and subsequently reach (I) 
again when the register scavenger complains about %P2 being undefined.
Let me know if I am missing something.

Pranav


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