[llvm] r178304 - [Mips Assembler] Add alias definitions for jal
Jack Carter
jack.carter at imgtec.com
Thu Mar 28 16:02:22 PDT 2013
Author: jacksprat
Date: Thu Mar 28 18:02:21 2013
New Revision: 178304
URL: http://llvm.org/viewvc/llvm-project?rev=178304&view=rev
Log:
[Mips Assembler] Add alias definitions for jal
Mips assembler allows following to be used as aliased instructions:
jal $rs for jalr $rs
jal $rd,$rd for jalr $rd,$rs
This patch provides alias definitions in td files and test cases to show the usage.
Contributer: Vladimir Medic
Modified:
llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td
llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
llvm/trunk/test/MC/Mips/mips-jump-instructions.s
Modified: llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td?rev=178304&r1=178303&r2=178304&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td Thu Mar 28 18:02:21 2013
@@ -332,6 +332,10 @@ def : InstAlias<"not $rt, $rs",
def : InstAlias<"j $rs", (JR64 CPU64Regs:$rs), 0>, Requires<[HasMips64]>;
def : InstAlias<"jalr $rs", (JALR64 RA_64, CPU64Regs:$rs)>,
Requires<[HasMips64]>;
+def : InstAlias<"jal $rs", (JALR64 RA_64, CPU64Regs:$rs), 0>,
+ Requires<[HasMips64]>;
+def : InstAlias<"jal $rd,$rs", (JALR64 CPU64Regs:$rd, CPU64Regs:$rs), 0>,
+ Requires<[HasMips64]>;
def : InstAlias<"daddu $rs, $rt, $imm",
(DADDiu CPU64RegsOpnd:$rs, CPU64RegsOpnd:$rt, simm16_64:$imm),
1>;
Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.td?rev=178304&r1=178303&r2=178304&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Thu Mar 28 18:02:21 2013
@@ -1001,6 +1001,9 @@ def : InstAlias<"and $rs, $rt, $imm",
def : InstAlias<"j $rs", (JR CPURegs:$rs), 0>,
Requires<[NotMips64]>;
def : InstAlias<"jalr $rs", (JALR RA, CPURegs:$rs)>, Requires<[NotMips64]>;
+def : InstAlias<"jal $rs", (JALR RA, CPURegs:$rs), 0>, Requires<[NotMips64]>;
+def : InstAlias<"jal $rd,$rs", (JALR CPURegs:$rd, CPURegs:$rs), 0>,
+ Requires<[NotMips64]>;
def : InstAlias<"not $rt, $rs",
(NOR CPURegsOpnd:$rt, CPURegsOpnd:$rs, ZERO), 1>;
def : InstAlias<"neg $rt, $rs",
Modified: llvm/trunk/test/MC/Mips/mips-jump-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips-jump-instructions.s?rev=178304&r1=178303&r2=178304&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/mips-jump-instructions.s (original)
+++ llvm/trunk/test/MC/Mips/mips-jump-instructions.s Thu Mar 28 18:02:21 2013
@@ -1,4 +1,5 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
+# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | \
+# RUN: FileCheck %s
# Check that the assembler can handle the documented syntax
# for jumps and branches.
# CHECK: .section __TEXT,__text,regular,pure_instructions
@@ -25,6 +26,9 @@
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK: bal 1332 # encoding: [0x4d,0x01,0x11,0x04]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
+
+.set noreorder
+
b 1332
nop
bc1f 1332
@@ -63,6 +67,11 @@ end_of_code:
# CHECK: jr $7 # encoding: [0x08,0x00,0xe0,0x00]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK: jr $7 # encoding: [0x08,0x00,0xe0,0x00]
+# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
+# CHECK: jalr $25 # encoding: [0x09,0xf8,0x20,0x03]
+# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
+# CHECK: jalr $4, $25 # encoding: [0x09,0x20,0x20,0x03]
+# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
j 1328
@@ -78,3 +87,8 @@ end_of_code:
jr $7
nop
j $7
+ nop
+ jal $25
+ nop
+ jal $4,$25
+ nop
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