[PATCH] Use direct types in some PowerPC Altivec instructions and patterns

[Bill Schmidt]

On Wed, 2013-03-27 at 17:53 -0500, Bill Schmidt wrote:
> The attached patch follows up Ulrich Weigand's work in PPCInstrInfo.td
> and PPCInstr64Bit.td by getting at least part of the work done for the
> Altivec patterns.  I have not yet been able to do anything for the
> following classes of instructions:
> 
> (1) Instructions that don't treat the vector register as any
> particular vector type.  These probably have to be left as is.
> Affected instructions are:  MFVSCR, MTVSCR, LVX, LVXL, STVX, STVXL,
> VPERM, VSEL, VSLDOI, VAND, VANDC, VNOR, VOR, VXOR, VSL, VSLO, VSR,
> VSRO, V_SET0.
> 
> (2) Instructions built on a helper class that use more than one
> register type.  These can probably be handled by creating another
> helper class that allows all ValueTypes to be passed in; I plan to try
> this.  Affected instructions are:  VMHADDSHS, VMHRADDSHS, VMLADDUHM,
> VMSUM*, VMULE*, VMULO*, VSUMSWS, VSUM2SWS, VSUM4*, VPK*, VUPK*.
> 
> (3) Instructions that don't compile cleanly under tablegen for reasons
> I haven't yet had time to investigate.  Generally these seem to use
> patterns that have picked a particular vector type that isn't
> compatible with the natural type for the instruction.  Affected
> instructions are:  VMRG*, VSPLTB, VSPLTH, VSPLTW, VPKUHUM, VPKUWUM,
> and the fmul pattern.
> 
> I'd appreciate some review to be sure I didn't make any subtle
> mistakes.  The test suite passes, but the coverage may not be 100%.
> Thanks in advance!
> 
> If this looks ok, I'll spend a little more time tomorrow on (2) and
> (3).
> 
> Bill
> 

I was able to use direct types for most of the remaining instructions.
Committed as r278277.

Bill