[llvm] r178170 - Fix typo (common to both X86 and PPC)

[Michael Liao]

On Wed, 2013-03-27 at 15:11 -0500, Hal Finkel wrote:
> ----- Original Message -----
> > From: "Michael Liao" <michael.liao at intel.com>
> > To: "Hal Finkel" <hfinkel at anl.gov>
> > Cc: llvm-commits at cs.uiuc.edu
> > Sent: Wednesday, March 27, 2013 2:57:32 PM
> > Subject: Re: [llvm] r178170 - Fix typo (common to both X86 and PPC)
> > 
> > thanks for correcting that, :)
> 
> No problem.
> 
> By the way, does the X86 SjLj code work correctly with functions with dynamic stack realignment. If you need a base pointer, is that saved/restored? (just from looking through the code, that was not clear to me because it would be reserved, and I don't know if those are always spilled).

As all registers are added in regmask, if function at that point
(EH_SjLj_Setup) uses base pointer register, it will be spilled and
restored from the restoreMBB. Your PPC implementation needs similar
thing to mask all registers clobbered at that point.

Yours
- Michael

> 
>  -Hal
> 
> > 
> > - michael
> > 
> > On Wed, 2013-03-27 at 19:10 +0000, Hal Finkel wrote:
> > > Author: hfinkel
> > > Date: Wed Mar 27 14:10:42 2013
> > > New Revision: 178170
> > > 
> > > URL: http://llvm.org/viewvc/llvm-project?rev=178170&view=rev
> > > Log:
> > > Fix typo (common to both X86 and PPC)
> > > 
> > > Thanks to Bill Schmidt for pointing this out during code review!
> > > 
> > > Modified:
> > >     llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
> > >     llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> > > 
> > > Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
> > > URL:
> > > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=178170&r1=178169&r2=178170&view=diff
> > > ==============================================================================
> > > --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
> > > +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Wed Mar 27
> > > 14:10:42 2013
> > > @@ -212,7 +212,7 @@ PPCTargetLowering::PPCTargetLowering(PPC
> > >    setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand);
> > >    setOperationAction(ISD::EHSELECTION,   MVT::i32, Expand);
> > >  
> > > -  // NOTE: EH_SJLJ_SETJMP/_LONGJMP supported here is NOT intened
> > > to support
> > > +  // NOTE: EH_SJLJ_SETJMP/_LONGJMP supported here is NOT intended
> > > to support
> > >    // SjLj exception handling but a light-weight setjmp/longjmp
> > >    replacement to
> > >    // support continuation, user-level threading, and etc.. As a
> > >    result, no
> > >    // other SjLj exception interfaces are implemented and please
> > >    don't build
> > > 
> > > Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> > > URL:
> > > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=178170&r1=178169&r2=178170&view=diff
> > > ==============================================================================
> > > --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
> > > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Mar 27
> > > 14:10:42 2013
> > > @@ -470,7 +470,7 @@ X86TargetLowering::X86TargetLowering(X86
> > >      setOperationAction(ISD::SETCC         , MVT::i64  , Custom);
> > >    }
> > >    setOperationAction(ISD::EH_RETURN       , MVT::Other, Custom);
> > > -  // NOTE: EH_SJLJ_SETJMP/_LONGJMP supported here is NOT intened
> > > to support
> > > +  // NOTE: EH_SJLJ_SETJMP/_LONGJMP supported here is NOT intended
> > > to support
> > >    // SjLj exception handling but a light-weight setjmp/longjmp
> > >    replacement to
> > >    // support continuation, user-level threading, and etc.. As a
> > >    result, no
> > >    // other SjLj exception interfaces are implemented and please
> > >    don't build
> > > 
> > > 
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> > 
> > 
> >