[llvm] r178137 - Fix target-customized spilling in the register scavenger

[Hal Finkel]

Author: hfinkel
Date: Wed Mar 27 08:00:56 2013
New Revision: 178137

URL: http://llvm.org/viewvc/llvm-project?rev=178137&view=rev
Log:
Fix target-customized spilling in the register scavenger

This is a follow-up to r178073 (which should actually make target-customized
spilling work again).

I still don't have a regression test for this (but it would be good to have
one; Thumb 1 and Mips16 use this callback as well).

Patch by Richard Sandiford.

Modified:
    llvm/trunk/lib/CodeGen/RegisterScavenging.cpp

Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=178137&r1=178136&r2=178137&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Wed Mar 27 08:00:56 2013
@@ -371,7 +371,7 @@ unsigned RegScavenger::scavengeRegister(
     if (Scavenged[SI].Reg == 0)
       break;
 
-  if (SI < Scavenged.size()) {
+  if (SI == Scavenged.size()) {
     // We need to scavenge a register but have no spill slot, the target
     // must know how to do it (if not, we'll assert below).
     Scavenged.push_back(ScavengedInfo());