[PATCH] Enable partial update depency breaking for A15

[Renato Golin]

LGTM

cheers,
Renato
On 27 Mar 2013 10:41, "Silviu Baranga" <Silviu.Baranga at arm.com> wrote:

>  Hi Renato,****
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> I’ve modified the patch according to your comments. The tests should****
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> now be much better documented.****
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> Is it ok to commit?****
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> Cheers,****
>
> Silviu****
>
> ** **
>
> *From:* Renato Golin [mailto:renato.golin at linaro.org]
> *Sent:* 26 March 2013 21:57
> *To:* Silviu Baranga
> *Cc:* Commit Messages and Patches for LLVM
> *Subject:* Re: [PATCH] Enable partial update depency breaking for A15****
>
> ** **
>
> On 26 March 2013 21:48, Silviu Baranga <Silviu.Baranga at arm.com> wrote:****
>
> I should have added some comments to these tests (will do so tomorrow).
> The generated code uses a vld1.32 instruction to write the lane 1 of a D
> register
> containing the value of <2 x float> %B. Since the D register is defined,
> it would
> be incorrect to fully write it (with a vmov.f64) before the vld1.32
> instruction.
> Test checks that a vmov.f64 was not generated.****
>
>  ** **
>
> Oh, I see. Makes sense. That as a comment would be great in the test. ;)**
> **
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> It could be anything that writes the D register, it doesn't matter. The
> existing code uses a FCONSTD (vmov.f64) to write the D register before the
> vld1.32 instruction (or other instructions that partially update D
> registers)
> in order to break the existing dependencies on the D register.****
>
>  ** **
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> That's what I though, ok. It'd be better to test for something a bit more
> generic, since it could be many other types of VMOVs on D regs.****
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> Maybe:****
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> ; CHECK: vmov{{.*}}d{{[0-9]+}},****
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> or something. It also makes it more explicit what you're expecting,
> leaving less need for a comment right before it.****
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> Thanks!****
>
> --renato****
>
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