[llvm] r178096 - Don't spill PPC VRSAVE on non-Darwin (even in SjLj)

[Hal Finkel]

Author: hfinkel
Date: Tue Mar 26 19:02:20 2013
New Revision: 178096

URL: http://llvm.org/viewvc/llvm-project?rev=178096&view=rev
Log:
Don't spill PPC VRSAVE on non-Darwin (even in SjLj)

As Bill Schmidt pointed out to me, only on Darwin do we need to spill/restore
VRSAVE in the SjLj code. For non-Darwin, don't spill/restore VRSAVE (and I've
added some asserts to make sure that we're not).

As it turns out, we're not currently handling the Darwin case correctly (I've
added a FIXME in the test case). I've tried adding various implied register
definitions/uses to force the spill without success, so I'll need to address
this later.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCCallingConv.td
    llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
    llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
    llvm/trunk/test/CodeGen/PowerPC/sjlj.ll
    llvm/trunk/test/CodeGen/PowerPC/vrsave-spill.ll

Modified: llvm/trunk/lib/Target/PowerPC/PPCCallingConv.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCCallingConv.td?rev=178096&r1=178095&r2=178096&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCCallingConv.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCCallingConv.td Tue Mar 26 19:02:20 2013
@@ -137,7 +137,8 @@ def CSR_SVR464   : CalleeSavedRegs<(add
                                         V20, V21, V22, V23, V24, V25, V26, V27,
                                         V28, V29, V30, V31)>;
 
-def CSR_NoRegs : CalleeSavedRegs<(add)>;
+def CSR_NoRegs : CalleeSavedRegs<(add VRSAVE)>;
+def CSR_NoRegs_Darwin : CalleeSavedRegs<(add)>;
 
 def CSR_NoRegs_Altivec : CalleeSavedRegs<(add (sequence "V%u", 0, 31), VRSAVE)>;
 

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp?rev=178096&r1=178095&r2=178096&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp Tue Mar 26 19:02:20 2013
@@ -509,6 +509,8 @@ PPCInstrInfo::StoreRegToStackSlot(Machin
                                        FrameIdx));
     NonRI = true;
   } else if (PPC::VRSAVERCRegClass.hasSubClassEq(RC)) {
+    assert(TM.getSubtargetImpl()->isDarwin() &&
+           "VRSAVE only needs spill/restore on Darwin");
     NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::SPILL_VRSAVE))
                                        .addReg(SrcReg,
                                                getKillRegState(isKill)),
@@ -627,6 +629,8 @@ PPCInstrInfo::LoadRegFromStackSlot(Machi
                                        FrameIdx));
     NonRI = true;
   } else if (PPC::VRSAVERCRegClass.hasSubClassEq(RC)) {
+    assert(TM.getSubtargetImpl()->isDarwin() &&
+           "VRSAVE only needs spill/restore on Darwin");
     NewMIs.push_back(addFrameReference(BuildMI(MF, DL,
                                                get(PPC::RESTORE_VRSAVE),
                                                DestReg),

Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=178096&r1=178095&r2=178096&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Tue Mar 26 19:02:20 2013
@@ -114,6 +114,8 @@ PPCRegisterInfo::getNoPreservedMask() co
   if (!Subtarget.hasAltivec())
     return CSR_NoRegs_Altivec_RegMask;
 
+  if (Subtarget.isDarwin())
+    return CSR_NoRegs_Darwin_RegMask;
   return CSR_NoRegs_RegMask;
 }
 

Modified: llvm/trunk/test/CodeGen/PowerPC/sjlj.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/sjlj.ll?rev=178096&r1=178095&r2=178096&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/sjlj.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/sjlj.ll Tue Mar 26 19:02:20 2013
@@ -57,8 +57,12 @@ return:
   %3 = load i32* %retval
   ret i32 %3
 
+; FIXME: We should be saving VRSAVE on Darwin, but we're not!
+
 ; CHECK: @main
 ; CHECK: std
+; Make sure that we're not saving VRSAVE on non-Darwin:
+; CHECK-NOT: mfspr
 ; CHECK: stfd
 ; CHECK: stvx
 

Modified: llvm/trunk/test/CodeGen/PowerPC/vrsave-spill.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/vrsave-spill.ll?rev=178096&r1=178095&r2=178096&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/vrsave-spill.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/vrsave-spill.ll Tue Mar 26 19:02:20 2013
@@ -1,18 +1,19 @@
-; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 | FileCheck %s
+; RUN: llc < %s -mtriple=powerpc64-apple-darwin -mcpu=g5 | FileCheck %s
 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
-target triple = "powerpc64-unknown-linux-gnu"
+target triple = "powerpc64-apple-darwin"
 
 define <4 x float> @foo(<4 x float> %a, <4 x float> %b) nounwind {
 entry:
   %c = fadd <4 x float> %a, %b
+  %d = fmul <4 x float> %c, %a
   call void asm sideeffect "", "~{VRsave}"() nounwind
   br label %return
 
 ; CHECK: @foo
-; CHECK: mfspr {{[0-9]+}}, 256
-; CHECK: mtspr 256, {{[0-9]+}}
+; CHECK: mfspr r{{[0-9]+}}, 256
+; CHECK: mtspr 256, r{{[0-9]+}}
 
 return:                                           ; preds = %entry
-  ret <4 x float> %c
+  ret <4 x float> %d
 }