[PATCH] Enable partial update depency breaking for A15

[Renato Golin]

Hi Silviu,

+; CHECK: t1:
+define <2 x float> @t1(float* %A, <2 x float> %B) {
+; CHECK-NOT: vmov.f64
+  %tmp2 = load float* %A, align 4
+  %tmp3 = insertelement <2 x float> %B, float %tmp2, i32 1
+  ret <2 x float> %tmp3

What are you expecting here?

+; CHECK: t2:
+define void @t2(<4 x i8> *%in, <4 x i8> *%out, i32 %n) {
+entry:
+  br label %loop
+loop:
+; CHECK: vmov.f64

I'm lost, why f64?

-    if ((DisableA15SDOptimization || !getARMSubtarget().isCortexA15()) &&
-      getARMSubtarget().hasNEON())
+    if (getARMSubtarget().hasNEON())

Now it always run? Any strong reason for dropping the A15 / opt constraints?

   // A9-like cores are particularly picky about mixing the two and want
these
   // converted.
-  if (Subtarget.isLikeA9() && !isPredicated(MI) &&
+  if (Subtarget.isCortexA9() && !isPredicated(MI) &&

Would be good to update the comment, too.

cheers,
--renato
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20130326/0a5d2646/attachment.html>