Fix for PR14824: Optimization arm_ldst_opt inserts newly generated instruction vldmia at incorrect position

Renato Golin renato.golin at linaro.org
Tue Mar 26 13:25:03 PDT 2013


On 25 March 2013 16:20, Stepan Dyatkovskiy <stpworld at narod.ru> wrote:

> Hello Jiangning,
> The main reason I did it, is that we need to analyze contents of MemOps
> *each time* we modify it: we need to prevent more than one "load"
> operations into the same place.
>

Hi Stepan,

I like the idea of inspecting it on every load, but the current patch is
very inefficient.

On:

+    SmallVector<unsigned, 4> getElementaries(unsigned Reg) {

You create the small vector on *every* call. This is really bad. And then
you iterate and compare every register of the new operations with every
register of every other operation so far. That's far from optimal. This is
why STL sorts and creates new sets, etc.

If I get correctly you don't need a list of memory ops and their respective
registers, but the opposite, since you're looking for registers, not memory
ops.

So, instead of keeping a list of operations and querying their registers
*every single time*, you can keep a list of registers "in use" with a
pointer to a small vector with the memory operations that use that register.

That will give you near constant time query over all registers in use and
you'll only have to gather the registers (via getElementaries) once per
operation.

The rest looks ok, the encapsulation of MemOps into MemOpsTrckr seems to
work (wrt push_back/insert).

Would also be good to have the IR in the PR bug as a test, just to make
sure the objective was met and to have a history on what this patch is
fixing.

Thanks,
--renato
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