[llvm] r177427 - Fix sub-operand size mismatch in tocentry operands.

[Ulrich Weigand]

Author: uweigand
Date: Tue Mar 19 14:50:30 2013
New Revision: 177427

URL: http://llvm.org/viewvc/llvm-project?rev=177427&view=rev
Log:
Fix sub-operand size mismatch in tocentry operands.

The tocentry operand class refers to 64-bit values (it is only used in 64-bit,
where iPTR is a 64-bit type), but its sole suboperand is designated as 32-bit
type.  This causes a mismatch to be detected at compile-time with the TableGen
patch I'll check in shortly.

To fix this, this commit changes the suboperand to a 64-bit type as well.


Modified:
    llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=177427&r1=177426&r2=177427&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Tue Mar 19 14:50:30 2013
@@ -30,7 +30,7 @@ def symbolLo64 : Operand<i64> {
   let EncoderMethod = "getLO16Encoding";
 }
 def tocentry : Operand<iPTR> {
-  let MIOperandInfo = (ops i32imm:$imm);
+  let MIOperandInfo = (ops i64imm:$imm);
 }
 def memrs : Operand<iPTR> {   // memri where the immediate is a symbolLo64
   let PrintMethod = "printMemRegImm";