[PATCH] Improve performance of vector code on A15

[Silviu Baranga]

Hi Jakob,

 

Yes, having to run DCE after the pass is a bit ugly.

 

The pass can replace the producer of a DPR with a VDUP, making

the original producer of that DPR dead and potentially some other

instructions that were used by that producer (for example copy

instructions).

 

I've modified the pass to remove any dead instructions that it

creates, so now we don't run DCE anymore after the pass.

 

I've also removed the constant load widening code, since using

extra adr instruction made it equivalent with what is generated

by default.

 

Again, I've ran it through LNT and everything seems OK.

 

-Silviu

 

 

From: Jakob Stoklund Olesen [mailto:stoklund at 2pi.dk] 
Sent: 14 March 2013 16:35
To: Silviu Baranga
Cc: Tim Northover; James Molloy; Commit Messages and Patches for LLVM
Subject: Re: [PATCH] Improve performance of vector code on A15

 

 

On Mar 14, 2013, at 5:24 AM, "Silviu Baranga" <silbar01 at arm.com> wrote:





I'm attaching a new version of the A15 neon optimization patch
with the following improvements:

- we now always check if a register is virtual before
calling getVRegDef.

- the elideCopiesAndPHIs method previously had a chance to
enter in an infinite recursion since it also looks past PHI nodes.
I've fixed that by using a DFS instead.

- disabled VMOVS widening on A15 since it was not working well with
the optimization pass.

I've also tested the patch using the LNT testsuite and didn't get
any failures (except the ones that we already know about and were
already failing without the patch).

Would this be close to a state where it can get committed?

 

Looks good, except you should have to run DCE again. This doesn't seem like
something that needs to create dead code.

 

/jakob

 
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