[llvm] r177103 - Hexagon: Removed asserts regarding alignment and offset.
Jyotsna Verma
jverma at codeaurora.org
Thu Mar 14 12:08:03 PDT 2013
Author: jverma
Date: Thu Mar 14 14:08:03 2013
New Revision: 177103
URL: http://llvm.org/viewvc/llvm-project?rev=177103&view=rev
Log:
Hexagon: Removed asserts regarding alignment and offset.
We are warning the user about the alignment, so we should not assert.
Added:
llvm/trunk/test/CodeGen/Hexagon/misaligned-access.ll
Modified:
llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp
Modified: llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp?rev=177103&r1=177102&r2=177103&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp Thu Mar 14 14:08:03 2013
@@ -1949,6 +1949,10 @@ isValidOffset(const int Opcode, const in
// the given "Opcode". If "Offset" is not in the correct range, "ADD_ri" is
// inserted to calculate the final address. Due to this reason, the function
// assumes that the "Offset" has correct alignment.
+ // We used to assert if the offset was not properly aligned, however,
+ // there are cases where a misaligned pointer recast can cause this
+ // problem, and we need to allow for it. The front end warns of such
+ // misaligns with respect to load size.
switch(Opcode) {
@@ -1958,7 +1962,6 @@ isValidOffset(const int Opcode, const in
case Hexagon::STriw_indexed:
case Hexagon::STriw:
case Hexagon::STriw_f:
- assert((Offset % 4 == 0) && "Offset has incorrect alignment");
return (Offset >= Hexagon_MEMW_OFFSET_MIN) &&
(Offset <= Hexagon_MEMW_OFFSET_MAX);
@@ -1968,14 +1971,12 @@ isValidOffset(const int Opcode, const in
case Hexagon::STrid:
case Hexagon::STrid_indexed:
case Hexagon::STrid_f:
- assert((Offset % 8 == 0) && "Offset has incorrect alignment");
return (Offset >= Hexagon_MEMD_OFFSET_MIN) &&
(Offset <= Hexagon_MEMD_OFFSET_MAX);
case Hexagon::LDrih:
case Hexagon::LDriuh:
case Hexagon::STrih:
- assert((Offset % 2 == 0) && "Offset has incorrect alignment");
return (Offset >= Hexagon_MEMH_OFFSET_MIN) &&
(Offset <= Hexagon_MEMH_OFFSET_MAX);
@@ -2002,7 +2003,6 @@ isValidOffset(const int Opcode, const in
case Hexagon::MEMw_SUBr_MEM_V4 :
case Hexagon::MEMw_ANDr_MEM_V4 :
case Hexagon::MEMw_ORr_MEM_V4 :
- assert ((Offset % 4) == 0 && "MEMOPw offset is not aligned correctly." );
return (0 <= Offset && Offset <= 255);
case Hexagon::MEMh_ADDi_indexed_MEM_V4 :
@@ -2017,7 +2017,6 @@ isValidOffset(const int Opcode, const in
case Hexagon::MEMh_SUBr_MEM_V4 :
case Hexagon::MEMh_ANDr_MEM_V4 :
case Hexagon::MEMh_ORr_MEM_V4 :
- assert ((Offset % 2) == 0 && "MEMOPh offset is not aligned correctly." );
return (0 <= Offset && Offset <= 127);
case Hexagon::MEMb_ADDi_indexed_MEM_V4 :
Added: llvm/trunk/test/CodeGen/Hexagon/misaligned-access.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/misaligned-access.ll?rev=177103&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/misaligned-access.ll (added)
+++ llvm/trunk/test/CodeGen/Hexagon/misaligned-access.ll Thu Mar 14 14:08:03 2013
@@ -0,0 +1,16 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s
+; Check that the mis-aligned load doesn't cause compiler to assert.
+
+declare i32 @_hi(i64) #1
+ at temp1 = common global i32 0, align 4
+
+define i32 @CSDRSEARCH_executeSearchManager() #0 {
+entry:
+ %temp = alloca i32, align 4
+ %0 = load i32* @temp1, align 4
+ store i32 %0, i32* %temp, align 4
+ %1 = bitcast i32* %temp to i64*
+ %2 = load i64* %1, align 8
+ %call = call i32 @_hi(i64 %2)
+ ret i32 %call
+}
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