SplitRes_SELECT improvement

Relph, Richard Richard.Relph at amd.com
Tue Mar 12 08:00:09 PDT 2013


DAGTypeLegalizer::SplitRes_SELECT() currently does an assert if the condition is not of type MVT::i1. This patch uses the existing type of the condition to generate the type for the split conditions instead of a fixed i1.
This is an issue for us when trying to legalize a 8x or 16x vector to a 4x type… it isn't the case that we always have an MVT::i1 condition coming in.

Index: lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp	(revision 176837)
+++ lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp	(working copy)
@@ -490,10 +490,10 @@
   SDValue Cond = N->getOperand(0);
   CL = CH = Cond;
   if (Cond.getValueType().isVector()) {
-    assert(Cond.getValueType().getVectorElementType() == MVT::i1 &&
-           "Condition legalized before result?");
     unsigned NumElements = Cond.getValueType().getVectorNumElements();
-    EVT VCondTy = EVT::getVectorVT(*DAG.getContext(), MVT::i1, NumElements / 2);
+    EVT VCondTy = EVT::getVectorVT(*DAG.getContext(),
+                                   Cond.getValueType().getVectorElementType(),
+                                   NumElements / 2);
     CL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VCondTy, Cond,
                      DAG.getIntPtrConstant(0));
     CH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VCondTy, Cond,






More information about the llvm-commits mailing list