[llvm] r176688 - AArch64: expand sincos operations, we don't support them.
Tim Northover
Tim.Northover at arm.com
Fri Mar 8 05:55:07 PST 2013
Author: tnorthover
Date: Fri Mar 8 07:55:07 2013
New Revision: 176688
URL: http://llvm.org/viewvc/llvm-project?rev=176688&view=rev
Log:
AArch64: expand sincos operations, we don't support them.
Patch based on Mans Rullgard's.
Added:
llvm/trunk/test/CodeGen/AArch64/sincos-expansion.ll (with props)
Modified:
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=176688&r1=176687&r2=176688&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Fri Mar 8 07:55:07 2013
@@ -200,6 +200,8 @@ AArch64TargetLowering::AArch64TargetLowe
setOperationAction(ISD::FSIN, MVT::f32, Expand);
setOperationAction(ISD::FSIN, MVT::f64, Expand);
+ setOperationAction(ISD::FSINCOS, MVT::f32, Expand);
+ setOperationAction(ISD::FSINCOS, MVT::f64, Expand);
// Virtually no operation on f128 is legal, but LLVM can't expand them when
// there's a valid register class, so we need custom operations in most cases.
@@ -217,6 +219,7 @@ AArch64TargetLowering::AArch64TargetLowe
setOperationAction(ISD::FREM, MVT::f128, Expand);
setOperationAction(ISD::FRINT, MVT::f128, Expand);
setOperationAction(ISD::FSIN, MVT::f128, Expand);
+ setOperationAction(ISD::FSINCOS, MVT::f128, Expand);
setOperationAction(ISD::FSQRT, MVT::f128, Expand);
setOperationAction(ISD::FSUB, MVT::f128, Custom);
setOperationAction(ISD::FTRUNC, MVT::f128, Expand);
Added: llvm/trunk/test/CodeGen/AArch64/sincos-expansion.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/sincos-expansion.ll?rev=176688&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/sincos-expansion.ll (added)
+++ llvm/trunk/test/CodeGen/AArch64/sincos-expansion.ll Fri Mar 8 07:55:07 2013
@@ -0,0 +1,35 @@
+; RUN: llc -march=aarch64 -verify-machineinstrs < %s | FileCheck %s
+
+define float @test_sincos_f32(float %f) {
+ %sin = call float @sinf(float %f) readnone
+ %cos = call float @cosf(float %f) readnone
+; CHECK: bl cosf
+; CHECK: bl sinf
+ %val = fadd float %sin, %cos
+ ret float %val
+}
+
+define double @test_sincos_f64(double %f) {
+ %sin = call double @sin(double %f) readnone
+ %cos = call double @cos(double %f) readnone
+ %val = fadd double %sin, %cos
+; CHECK: bl cos
+; CHECK: bl sin
+ ret double %val
+}
+
+define fp128 @test_sincos_f128(fp128 %f) {
+ %sin = call fp128 @sinl(fp128 %f) readnone
+ %cos = call fp128 @cosl(fp128 %f) readnone
+ %val = fadd fp128 %sin, %cos
+; CHECK: bl cosl
+; CHECK: bl sinl
+ ret fp128 %val
+}
+
+declare float @sinf(float) readonly
+declare double @sin(double) readonly
+declare fp128 @sinl(fp128) readonly
+declare float @cosf(float) readonly
+declare double @cos(double) readonly
+declare fp128 @cosl(fp128) readonly
\ No newline at end of file
Propchange: llvm/trunk/test/CodeGen/AArch64/sincos-expansion.ll
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svn:eol-style = native
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