[PATCH] Improve performance of vector code on A15

[Silviu Baranga]

Hi all,

 

After reviews for the previous patch we changed the pass to be a
pre-regalloc one.

 

Following Jakob's suggestion, the new pass identifies optimization
opportunities

by looking through full copies and phis to get the set of instructions that
really

define a register.

 

The generated code patterns are mostly identical to the ones generated by
the previous

implementation of the pass.

 

An addition to the previous functionality is that the new implementation
also widens

constant pool loads where this is beneficial.

 

Please review!

 

Regards,

Silviu

 

From: Jakob Stoklund Olesen [mailto:stoklund at 2pi.dk] 
Sent: 22 February 2013 23:44
To: James Molloy
Cc: Tim Northover; Commit Messages and Patches for LLVM; Silviu Baranga
Subject: Re: [PATCH] Improve performance of vector code on A15

 

 

On Feb 22, 2013, at 3:39 PM, James Molloy <James.Molloy at arm.com> wrote:





Hi Jakob,

OK, we'll look at the pre regalloc pass again on Monday, but I really feel
it'll be more of a hack than anything else :(

 

Thanks, let me know if I can help.

 

You should be able to assume that all copy-like instructions are going to be
removed by the coalescer. Look through copies to find the instruction that
really defined a register.

 

/jakob
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