[llvm] r176485 - R600: Use MUL_IEEE for trig/fdiv intrinsic
Vincent Lejeune
vljn at ovi.com
Tue Mar 5 07:04:37 PST 2013
Author: vljn
Date: Tue Mar 5 09:04:37 2013
New Revision: 176485
URL: http://llvm.org/viewvc/llvm-project?rev=176485&view=rev
Log:
R600: Use MUL_IEEE for trig/fdiv intrinsic
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
Modified:
llvm/trunk/lib/Target/R600/R600Instructions.td
llvm/trunk/test/CodeGen/R600/fdiv.v4f32.ll
Modified: llvm/trunk/lib/Target/R600/R600Instructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600Instructions.td?rev=176485&r1=176484&r2=176485&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/R600Instructions.td (original)
+++ llvm/trunk/lib/Target/R600/R600Instructions.td Tue Mar 5 09:04:37 2013
@@ -1090,12 +1090,12 @@ class COS_Common <bits<11> inst> : R600_
multiclass DIV_Common <InstR600 recip_ieee> {
def : Pat<
(int_AMDGPU_div R600_Reg32:$src0, R600_Reg32:$src1),
- (MUL R600_Reg32:$src0, (recip_ieee R600_Reg32:$src1))
+ (MUL_IEEE R600_Reg32:$src0, (recip_ieee R600_Reg32:$src1))
>;
def : Pat<
(fdiv R600_Reg32:$src0, R600_Reg32:$src1),
- (MUL R600_Reg32:$src0, (recip_ieee R600_Reg32:$src1))
+ (MUL_IEEE R600_Reg32:$src0, (recip_ieee R600_Reg32:$src1))
>;
}
@@ -1169,12 +1169,12 @@ let Predicates = [isR600] in {
// cards.
class COS_PAT <InstR600 trig> : Pat<
(fcos R600_Reg32:$src),
- (trig (MUL (MOV_IMM_I32 CONST.TWO_PI_INV), R600_Reg32:$src))
+ (trig (MUL_IEEE (MOV_IMM_I32 CONST.TWO_PI_INV), R600_Reg32:$src))
>;
class SIN_PAT <InstR600 trig> : Pat<
(fsin R600_Reg32:$src),
- (trig (MUL (MOV_IMM_I32 CONST.TWO_PI_INV), R600_Reg32:$src))
+ (trig (MUL_IEEE (MOV_IMM_I32 CONST.TWO_PI_INV), R600_Reg32:$src))
>;
//===----------------------------------------------------------------------===//
Modified: llvm/trunk/test/CodeGen/R600/fdiv.v4f32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fdiv.v4f32.ll?rev=176485&r1=176484&r2=176485&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fdiv.v4f32.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fdiv.v4f32.ll Tue Mar 5 09:04:37 2013
@@ -1,13 +1,13 @@
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
;CHECK: RECIP_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
-;CHECK: MUL NON-IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
+;CHECK: MUL_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
;CHECK: RECIP_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
-;CHECK: MUL NON-IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
+;CHECK: MUL_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
;CHECK: RECIP_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
-;CHECK: MUL NON-IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
+;CHECK: MUL_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
;CHECK: RECIP_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
-;CHECK: MUL NON-IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
+;CHECK: MUL_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
define void @test(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) {
%b_ptr = getelementptr <4 x float> addrspace(1)* %in, i32 1
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