[llvm] r176002 - Make psuedo FEXT_T8I816_ins into a custom emitter.
Reed Kotler
rkotler at mips.com
Sun Feb 24 15:17:51 PST 2013
Author: rkotler
Date: Sun Feb 24 17:17:51 2013
New Revision: 176002
URL: http://llvm.org/viewvc/llvm-project?rev=176002&view=rev
Log:
Make psuedo FEXT_T8I816_ins into a custom emitter.
Modified:
llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp
llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h
llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td
llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
llvm/trunk/lib/Target/Mips/MipsISelLowering.h
Modified: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp?rev=176002&r1=176001&r2=176002&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp Sun Feb 24 17:17:51 2013
@@ -135,30 +135,6 @@ bool Mips16InstrInfo::expandPostRAPseudo
switch(MI->getDesc().getOpcode()) {
default:
return false;
- case Mips::BteqzT8CmpiX16:
- ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BteqzX16,
- Mips::CmpiRxImm16, Mips::CmpiRxImmX16);
- break;
- case Mips::BteqzT8SltiX16:
- ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BteqzX16,
- Mips::SltiRxImm16, Mips::SltiRxImmX16);
- break;
- case Mips::BteqzT8SltiuX16:
- ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BteqzX16,
- Mips::SltiuRxImm16, Mips::SltiuRxImmX16);
- break;
- case Mips::BtnezT8CmpiX16:
- ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BtnezX16,
- Mips::CmpiRxImm16, Mips::CmpiRxImmX16);
- break;
- case Mips::BtnezT8SltiX16:
- ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BtnezX16,
- Mips::SltiRxImm16, Mips::SltiRxImmX16);
- break;
- case Mips::BtnezT8SltiuX16:
- ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BtnezX16,
- Mips::SltiuRxImm16, Mips::SltiuRxImmX16);
- break;
case Mips::RetRA16:
ExpandRetRA16(MBB, MI, Mips::JrcRa16);
break;
@@ -435,35 +411,6 @@ void Mips16InstrInfo::ExpandRetRA16(Mach
BuildMI(MBB, I, I->getDebugLoc(), get(Opc));
}
-
-void Mips16InstrInfo::ExpandFEXT_T8I816_ins(
- MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
- unsigned BtOpc, unsigned CmpOpc) const {
- unsigned regX = I->getOperand(0).getReg();
- unsigned regY = I->getOperand(1).getReg();
- MachineBasicBlock *target = I->getOperand(2).getMBB();
- BuildMI(MBB, I, I->getDebugLoc(), get(CmpOpc)).addReg(regX).addReg(regY);
- BuildMI(MBB, I, I->getDebugLoc(), get(BtOpc)).addMBB(target);
-
-}
-
-void Mips16InstrInfo::ExpandFEXT_T8I8I16_ins(
- MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
- unsigned BtOpc, unsigned CmpiOpc, unsigned CmpiXOpc) const {
- unsigned regX = I->getOperand(0).getReg();
- int64_t imm = I->getOperand(1).getImm();
- MachineBasicBlock *target = I->getOperand(2).getMBB();
- unsigned CmpOpc;
- if (isUInt<8>(imm))
- CmpOpc = CmpiOpc;
- else if (isUInt<16>(imm))
- CmpOpc = CmpiXOpc;
- else
- llvm_unreachable("immediate field not usable");
- BuildMI(MBB, I, I->getDebugLoc(), get(CmpOpc)).addReg(regX).addImm(imm);
- BuildMI(MBB, I, I->getDebugLoc(), get(BtOpc)).addMBB(target);
-}
-
void Mips16InstrInfo::ExpandFEXT_CCRX16_ins(
MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned SltOpc) const {
Modified: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h?rev=176002&r1=176001&r2=176002&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h (original)
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h Sun Feb 24 17:17:51 2013
@@ -115,14 +115,6 @@ private:
MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const;
- void ExpandFEXT_T8I816_ins(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator I,
- unsigned BtOpc, unsigned CmpOpc) const;
-
- void ExpandFEXT_T8I8I16_ins(
- MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
- unsigned BtOpc, unsigned CmpiOpc, unsigned CmpiXOpc) const;
-
void ExpandFEXT_CCRX16_ins(
MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned SltOpc) const;
Modified: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td?rev=176002&r1=176001&r2=176002&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td Sun Feb 24 17:17:51 2013
@@ -237,6 +237,7 @@ class FEXT_T8I8I16_ins<string asmstr, st
!strconcat(asmstr2, !strconcat("\t$rx, $imm\n\t",
!strconcat(asmstr, "\t$targ"))), []> {
let isCodeGenOnly=1;
+ let usesCustomInserter = 1;
}
//
Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=176002&r1=176001&r2=176002&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Sun Feb 24 17:17:51 2013
@@ -1443,6 +1443,28 @@ MachineBasicBlock
MI->eraseFromParent(); // The pseudo instruction is gone now.
return BB;
}
+
+
+MachineBasicBlock *MipsTargetLowering::EmitFEXT_T8I8I16_ins(
+ unsigned BtOpc, unsigned CmpiOpc, unsigned CmpiXOpc,
+ MachineInstr *MI, MachineBasicBlock *BB) const {
+ const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
+ unsigned regX = MI->getOperand(0).getReg();
+ int64_t imm = MI->getOperand(1).getImm();
+ MachineBasicBlock *target = MI->getOperand(2).getMBB();
+ unsigned CmpOpc;
+ if (isUInt<8>(imm))
+ CmpOpc = CmpiOpc;
+ else if (isUInt<16>(imm))
+ CmpOpc = CmpiXOpc;
+ else
+ llvm_unreachable("immediate field not usable");
+ BuildMI(*BB, MI, MI->getDebugLoc(), TII->get(CmpOpc)).addReg(regX).addImm(imm);
+ BuildMI(*BB, MI, MI->getDebugLoc(), TII->get(BtOpc)).addMBB(target);
+ MI->eraseFromParent(); // The pseudo instruction is gone now.
+ return BB;
+}
+
MachineBasicBlock *
MipsTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
MachineBasicBlock *BB) const {
@@ -1598,6 +1620,19 @@ MipsTargetLowering::EmitInstrWithCustomI
// TBD: figure out a way to get this or remove the instruction
// altogether.
return EmitFEXT_T8I816_ins(Mips::BtnezX16, Mips::SltuRxRy16, MI, BB);
+ case Mips::BteqzT8CmpiX16: return EmitFEXT_T8I8I16_ins(
+ Mips::BteqzX16, Mips::CmpiRxImm16, Mips::CmpiRxImmX16, MI, BB);
+ case Mips::BteqzT8SltiX16: return EmitFEXT_T8I8I16_ins(
+ Mips::BteqzX16, Mips::SltiRxImm16, Mips::SltiRxImmX16, MI, BB);
+ case Mips::BteqzT8SltiuX16: return EmitFEXT_T8I8I16_ins(
+ Mips::BteqzX16, Mips::SltiuRxImm16, Mips::SltiuRxImmX16, MI, BB);
+ case Mips::BtnezT8CmpiX16: return EmitFEXT_T8I8I16_ins(
+ Mips::BtnezX16, Mips::CmpiRxImm16, Mips::CmpiRxImmX16, MI, BB);
+ case Mips::BtnezT8SltiX16: return EmitFEXT_T8I8I16_ins(
+ Mips::BtnezX16, Mips::SltiRxImm16, Mips::SltiRxImmX16, MI, BB);
+ case Mips::BtnezT8SltiuX16: return EmitFEXT_T8I8I16_ins(
+ Mips::BtnezX16, Mips::SltiuRxImm16, Mips::SltiuRxImmX16, MI, BB);
+ break;
}
}
Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.h?rev=176002&r1=176001&r2=176002&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.h Sun Feb 24 17:17:51 2013
@@ -416,6 +416,9 @@ namespace llvm {
MachineBasicBlock *EmitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc,
MachineInstr *MI,
MachineBasicBlock *BB) const;
+ MachineBasicBlock *EmitFEXT_T8I8I16_ins(
+ unsigned BtOpc, unsigned CmpiOpc, unsigned CmpiXOpc,
+ MachineInstr *MI, MachineBasicBlock *BB) const;
};
}
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