[llvm] r175747 - R600/SI: add constant for inline zero operand

[Christian Konig]

Author: ckoenig
Date: Thu Feb 21 09:16:49 2013
New Revision: 175747

URL: http://llvm.org/viewvc/llvm-project?rev=175747&view=rev
Log:
R600/SI: add constant for inline zero operand

Signed-off-by: Christian König <christian.koenig at amd.com>
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer at amd.com>

Modified:
    llvm/trunk/lib/Target/R600/SIInstrInfo.td

Modified: llvm/trunk/lib/Target/R600/SIInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstrInfo.td?rev=175747&r1=175746&r2=175747&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIInstrInfo.td (original)
+++ llvm/trunk/lib/Target/R600/SIInstrInfo.td Thu Feb 21 09:16:49 2013
@@ -49,9 +49,8 @@ class InlineImm <ValueType vt> : ImmLeaf
 // SI assembler operands
 //===----------------------------------------------------------------------===//
 
-class SIOperand <ValueType vt, dag opInfo>: Operand <vt> {
-  let EncoderMethod = "encodeOperand";
-  let MIOperandInfo = opInfo;
+def SIOperand {
+  int ZERO = 0x80;
 }
 
 class GPR4Align <RegisterClass rc> : Operand <vAny> {
@@ -201,7 +200,7 @@ multiclass VOPC_Helper <bits<8> op, Regi
          InstFlag:$omod, InstFlag:$neg),
     opName, pattern
   > {
-    let SRC2 = 0x80;
+    let SRC2 = SIOperand.ZERO;
   }
 }