[PATCH] Fix PR15267

[Michael Liao]

<4 x i1> is different from i4 though their encodings in memory are the
same. <4 x i1> needs to be bit-packed in memory. So far, we definie
memory size for EVTs as their bit sizes rounded to bytes. <4 x i1> will
occupy the same memory size as i4, i.e. it will be bit-packed.

Yours
- Michael

On Wed, 2013-02-20 at 11:35 +0100, Duncan Sands wrote:
> Hi Michael,
> 
>  > The root cause of PR15267 is the current logic assume byte-addressable
> > element during extloading from a vector. With <4 x i1> in memory, this
> > logic breaks. The attached patch fixes that by loading all bytes
> > associated to that type, extracting bits and re-packing them again to
> > form each element.
> 
> it sounds like you consider <4 x i1> to be bitpacked in memory, like i4.
> Is that right?
> 
> Ciao, Duncan.
> 
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