[llvm] r175380 - The transform is:

Muhammad Tauqir Ahmad muhammad.t.ahmad at intel.com
Tue Feb 19 02:26:23 PST 2013


This transform does work for vector-selects. The commit message is misleading.

- Muhammad Tauqir


On Sat, Feb 16, 2013 at 7:06 PM, Hal Finkel <hfinkel at anl.gov> wrote:
> ----- Original Message -----
>> From: "Bill Wendling" <isanbard at gmail.com>
>> To: llvm-commits at cs.uiuc.edu
>> Sent: Saturday, February 16, 2013 5:41:36 PM
>> Subject: [llvm] r175380 - The transform is:
>>
>> Author: void
>> Date: Sat Feb 16 17:41:36 2013
>> New Revision: 175380
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=175380&view=rev
>> Log:
>> The transform is:
>>
>>     (or (bool?A:B),(bool?C:D)) --> (bool?(or A,C):(or B,D))
>>
>> By the time the OR is visited, both the SELECTs have been visited and
>> not
>> optimized and the OR itself hasn't been transformed so we do this
>> transform in
>> the hopes that the new ORs will be optimized.
>>
>> The transform is explicitly disabled for vector-selects until
>> "codegen matures
>> to handle them better".
>
> I thought that Nadav had said that vector select support was better now. What happened with that?
>
>  -Hal
>
>>
>> Patch by Muhammad Tauqir!
>>
>> Modified:
>>     llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
>>     llvm/trunk/test/Transforms/InstCombine/logical-select.ll
>>     llvm/trunk/test/Transforms/InstCombine/or.ll
>>
>> Modified:
>> llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp?rev=175380&r1=175379&r2=175380&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
>> (original)
>> +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp Sat
>> Feb 16 17:41:36 2013
>> @@ -2071,6 +2071,20 @@ Instruction *InstCombiner::visitOr(Binar
>>      return BinaryOperator::CreateOr(Inner, C1);
>>    }
>>
>> +  // Change (or (bool?A:B),(bool?C:D)) --> (bool?(or A,C):(or B,D))
>> +  // Since this OR statement hasn't been optimized further yet, we
>> hope
>> +  // that this transformation will allow the new ORs to be
>> optimized.
>> +  {
>> +    Value *X = 0, *Y = 0;
>> +    if (Op0->hasOneUse() && Op1->hasOneUse() &&
>> +        match(Op0, m_Select(m_Value(X), m_Value(A), m_Value(B))) &&
>> +        match(Op1, m_Select(m_Value(Y), m_Value(C), m_Value(D))) &&
>> X == Y) {
>> +      Value *orTrue = Builder->CreateOr(A, C);
>> +      Value *orFalse = Builder->CreateOr(B, D);
>> +      return SelectInst::Create(X, orTrue, orFalse);
>> +    }
>> +  }
>> +
>>    return Changed ? &I : 0;
>>  }
>>
>>
>> Modified: llvm/trunk/test/Transforms/InstCombine/logical-select.ll
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/logical-select.ll?rev=175380&r1=175379&r2=175380&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/Transforms/InstCombine/logical-select.ll
>> (original)
>> +++ llvm/trunk/test/Transforms/InstCombine/logical-select.ll Sat Feb
>> 16 17:41:36 2013
>> @@ -10,10 +10,8 @@ define i32 @foo(i32 %a, i32 %b, i32 %c,
>>    %j = or i32 %g, %i
>>    ret i32 %j
>>  ; CHECK: %e = icmp slt i32 %a, %b
>> -; CHECK-NEXT: %g = select i1 %e, i32 %c, i32 0
>> -; CHECK-NEXT: %i = select i1 %e, i32 0, i32 %d
>> -; CHECK-NEXT: %j = or i32 %g, %i
>> -; CHECK-NEXT: ret i32 %j
>> +; CHECK-NEXT: [[result:%.*]] = select i1 %e, i32 %c, i32 %d
>> +; CHECK-NEXT: ret i32 [[result]]
>>  }
>>  define i32 @bar(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
>>    %e = icmp slt i32 %a, %b
>> @@ -24,10 +22,8 @@ define i32 @bar(i32 %a, i32 %b, i32 %c,
>>    %j = or i32 %i, %g
>>    ret i32 %j
>>  ; CHECK: %e = icmp slt i32 %a, %b
>> -; CHECK-NEXT: %g = select i1 %e, i32 %c, i32 0
>> -; CHECK-NEXT: %i = select i1 %e, i32 0, i32 %d
>> -; CHECK-NEXT: %j = or i32 %i, %g
>> -; CHECK-NEXT: ret i32 %j
>> +; CHECK-NEXT: [[result:%.*]] = select i1 %e, i32 %c, i32 %d
>> +; CHECK-NEXT: ret i32 [[result]]
>>  }
>>
>>  define i32 @goo(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
>> @@ -40,10 +36,8 @@ entry:
>>    %3 = or i32 %1, %2
>>    ret i32 %3
>>  ; CHECK: %0 = icmp slt i32 %a, %b
>> -; CHECK-NEXT: %1 = select i1 %0, i32 %c, i32 0
>> -; CHECK-NEXT: %2 = select i1 %0, i32 0, i32 %d
>> -; CHECK-NEXT: %3 = or i32 %1, %2
>> -; CHECK-NEXT: ret i32 %3
>> +; CHECK-NEXT: [[result:%.*]] = select i1 %0, i32 %c, i32 %d
>> +; CHECK-NEXT: ret i32 [[result]]
>>  }
>>  define i32 @poo(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
>>  entry:
>> @@ -55,10 +49,8 @@ entry:
>>    %3 = or i32 %1, %2
>>    ret i32 %3
>>  ; CHECK: %0 = icmp slt i32 %a, %b
>> -; CHECK-NEXT: %1 = select i1 %0, i32 %c, i32 0
>> -; CHECK-NEXT: %2 = select i1 %0, i32 0, i32 %d
>> -; CHECK-NEXT: %3 = or i32 %1, %2
>> -; CHECK-NEXT: ret i32 %3
>> +; CHECK-NEXT: [[result:%.*]] = select i1 %0, i32 %c, i32 %d
>> +; CHECK-NEXT: ret i32 [[result]]
>>  }
>>
>>  define i32 @par(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
>> @@ -71,8 +63,6 @@ entry:
>>    %3 = or i32 %1, %2
>>    ret i32 %3
>>  ; CHECK: %0 = icmp slt i32 %a, %b
>> -; CHECK-NEXT: %1 = select i1 %0, i32 %c, i32 0
>> -; CHECK-NEXT: %2 = select i1 %0, i32 0, i32 %d
>> -; CHECK-NEXT: %3 = or i32 %1, %2
>> -; CHECK-NEXT: ret i32 %3
>> +; CHECK-NEXT: [[result:%.*]] = select i1 %0, i32 %c, i32 %d
>> +; CHECK-NEXT: ret i32 [[result]]
>>  }
>>
>> Modified: llvm/trunk/test/Transforms/InstCombine/or.ll
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/or.ll?rev=175380&r1=175379&r2=175380&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/Transforms/InstCombine/or.ll (original)
>> +++ llvm/trunk/test/Transforms/InstCombine/or.ll Sat Feb 16 17:41:36
>> 2013
>> @@ -344,10 +344,9 @@ define <4 x i32> @test32(<4 x i1> %and.i
>>    %and.i = and <4 x i32> %vecinit6.i191, %neg.i   ; <<4 x i32>>
>>    [#uses=1]
>>    %or.i = or <4 x i32> %and.i, %and.i129          ; <<4 x i32>>
>>    [#uses=1]
>>    ret <4 x i32> %or.i
>> -; Don't turn this into a vector select until codegen matures to
>> handle them
>> -; better.
>> +; codegen is mature enough to handle vector selects.
>>  ; CHECK: @test32
>> -; CHECK: or <4 x i32> %and.i, %and.i129
>> +; CHECK: select <4 x i1> %and.i1352, <4 x i32> %vecinit6.i176, <4 x
>> i32> %vecinit6.i191
>>  }
>>
>>  define i1 @test33(i1 %X, i1 %Y) {
>>
>>
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