[llvm] r175443 - R600: Increase number of ArrayBase Reg to 32

[Vincent Lejeune]

Author: vljn
Date: Mon Feb 18 07:48:09 2013
New Revision: 175443

URL: http://llvm.org/viewvc/llvm-project?rev=175443&view=rev
Log:
R600: Increase number of ArrayBase Reg to 32

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

Modified:
    llvm/trunk/lib/Target/R600/R600RegisterInfo.td

Modified: llvm/trunk/lib/Target/R600/R600RegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600RegisterInfo.td?rev=175443&r1=175442&r2=175443&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/R600RegisterInfo.td (original)
+++ llvm/trunk/lib/Target/R600/R600RegisterInfo.td Mon Feb 18 07:48:09 2013
@@ -44,7 +44,7 @@ foreach Index = 0-127 in {
 }
 
 // Array Base Register holding input in FS
-foreach Index = 448-464 in {
+foreach Index = 448-480 in {
   def ArrayBase#Index :  R600Reg<"ARRAY_BASE", Index>;
 }
 
@@ -66,7 +66,7 @@ def PRED_SEL_ONE : R600Reg<"Pred_sel_one
 def AR_X : R600Reg<"AR.x", 0>;
 
 def R600_ArrayBase : RegisterClass <"AMDGPU", [f32, i32], 32,
-                          (add (sequence "ArrayBase%u", 448, 464))>;
+                          (add (sequence "ArrayBase%u", 448, 480))>;
 // special registers for ALU src operands
 // const buffer reference, SRCx_SEL contains index
 def ALU_CONST : R600Reg<"CBuf", 0>;