Please review: X86 sext pattern optimization

[Demikhovsky, Elena]

I optimized the following patterns:
sext <4 x i1> to <4 x i64>
sext <4 x i8> to <4 x i64>
sext <4 x i16> to <4 x i64>

I'm running Combine on SIGN_EXTEND_IN_REG and revert SEXT patterns:
(sext_in_reg (v4i64 anyext (v4i32 x )), ExtraVT) -> (v4i64 sext (v4i32 sext_in_reg (v4i32 x , ExtraVT)))

The sext_in_reg (v4i32 x) may be lowered to shl+sar operations.

The "sar" does not exist on 64-bit operation, so lowering sext_in_reg (v4i64 x) has no vector solution.


- Elena


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