[Mesa-dev] [PATCH] R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern

[Tom Stellard]

On Mon, Feb 11, 2013 at 03:47:47PM +0100, Christian König wrote:
> Am 11.02.2013 15:35, schrieb Michel Dänzer:
> >On Son, 2013-02-10 at 19:38 +0100, Vincent Lejeune wrote:
> >>diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td
> >>index a09f243..7e50e86 100644
> >>--- a/lib/Target/R600/SIInstructions.td
> >>+++ b/lib/Target/R600/SIInstructions.td
> >>@@ -1423,8 +1423,8 @@ def : Pat <
> >>  /**********   VOP3 Patterns    **********/
> >>  /********** ================== **********/
> >>-def : Pat <(f32 (IL_mad AllReg_32:$src0, VReg_32:$src1, VReg_32:$src2)),
> >>-           (V_MAD_LEGACY_F32 AllReg_32:$src0, VReg_32:$src1, VReg_32:$src2,
> >>+def : Pat <(f32 (fadd (fmul AllReg_32:$src0, VReg_32:$src1), VReg_32:$src2)),
> >>+           (V_MAD_F32 AllReg_32:$src0, VReg_32:$src1, VReg_32:$src2,
> >>              0, 0, 0, 0)>;
> >I still feel a bit uneasy about applying the SI changes without fully
> >understanding why they break those piglit tests. Though I guess it might
> >be okay if you're not targetting this for the Mesa stable branch...
> >Tom / Christian, what's your opinion on this?
> 
> I think I'm on the way figuring out what's going wrong here. One
> step is that the _e64 encoding of (for example) V_CND_* is slightly
> wrong and working only by coincident, but there seems to be at least
> one more thing quite wrong here.
> 

Several of the failing shaders use indirect addressing, which on radeonsi is
lowered to a lot of select statement since the driver does not support
it yet.  It's likely that this is the real problem.

Also, do you know about the -show-mc-encoding flag for llc, it displays the
encoding along side the assembly and is useful for debugging encoding issues.

- Tom

> Give me a day or two I've coded a whole bunch of patches while on
> vacation (including a fix for this), but I doesn't have the hardware
> here to test them.
> 
> Christian.
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