[llvm] r174852 - Spelling correction

[Joel Jones]

Author: joel_k_jones
Date: Sun Feb 10 17:56:30 2013
New Revision: 174852

URL: http://llvm.org/viewvc/llvm-project?rev=174852&view=rev
Log:
Spelling correction

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp

Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=174852&r1=174851&r2=174852&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Sun Feb 10 17:56:30 2013
@@ -2691,7 +2691,7 @@ static bool findEXTRHalf(SDValue N, SDVa
   return true;
 }
 
-/// EXTR instruciton extracts a contiguous chunk of bits from two existing
+/// EXTR instruction extracts a contiguous chunk of bits from two existing
 /// registers viewed as a high/low pair. This function looks for the pattern:
 /// (or (shl VAL1, #N), (srl VAL2, #RegWidth-N)) and replaces it with an
 /// EXTR. Can't quite be done in TableGen because the two immediates aren't