[llvm] r174392 - R600: Emit function name in the AsmPrinter
Nadav Rotem
nrotem at apple.com
Wed Feb 6 21:27:36 PST 2013
Hi Tom,
Can you please document your recent R600 changes in the release notes ?
Thanks,
Nadav
On Feb 5, 2013, at 9:09 AM, Tom Stellard <thomas.stellard at amd.com> wrote:
> Author: tstellar
> Date: Tue Feb 5 11:09:11 2013
> New Revision: 174392
>
> URL: http://llvm.org/viewvc/llvm-project?rev=174392&view=rev
> Log:
> R600: Emit function name in the AsmPrinter
>
> Emitting the function name allows us to check for it in the FileCheck
> tests so we can make sure FileCheck is checking the output of the
> correct function.
>
> Modified:
> llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp
> llvm/trunk/test/CodeGen/R600/dagcombiner-bug-illegal-vec4-int-to-fp.ll
> llvm/trunk/test/CodeGen/R600/literals.ll
> llvm/trunk/test/CodeGen/R600/short-args.ll
> llvm/trunk/test/CodeGen/R600/vec4-expand.ll
>
> Modified: llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp?rev=174392&r1=174391&r2=174392&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp (original)
> +++ llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp Tue Feb 5 11:09:11 2013
> @@ -47,6 +47,9 @@ bool AMDGPUAsmPrinter::runOnMachineFunct
> #endif
> }
> SetupMachineFunction(MF);
> + if (OutStreamer.hasRawTextSupport()) {
> + OutStreamer.EmitRawText("@" + MF.getName() + ":");
> + }
> OutStreamer.SwitchSection(getObjFileLowering().getTextSection());
> if (STM.device()->getGeneration() > AMDGPUDeviceInfo::HD6XXX) {
> EmitProgramInfo(MF);
>
> Modified: llvm/trunk/test/CodeGen/R600/dagcombiner-bug-illegal-vec4-int-to-fp.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/dagcombiner-bug-illegal-vec4-int-to-fp.ll?rev=174392&r1=174391&r2=174392&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/R600/dagcombiner-bug-illegal-vec4-int-to-fp.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/dagcombiner-bug-illegal-vec4-int-to-fp.ll Tue Feb 5 11:09:11 2013
> @@ -1,13 +1,15 @@
> ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
>
> -;CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> -
> ; This test is for a bug in
> ; DAGCombiner::reduceBuildVecConvertToConvertBuildVec() where
> ; the wrong type was being passed to
> ; TargetLowering::getOperationAction() when checking the legality of
> ; ISD::UINT_TO_FP and ISD::SINT_TO_FP opcodes.
>
> +
> +; CHECK: @sint
> +; CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> +
> define void @sint(<4 x float> addrspace(1)* %out, i32 addrspace(1)* %in) {
> entry:
> %ptr = getelementptr i32 addrspace(1)* %in, i32 1
> @@ -19,6 +21,7 @@ entry:
> ret void
> }
>
> +;CHECK: @uint
> ;CHECK: UINT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
>
> define void @uint(<4 x float> addrspace(1)* %out, i32 addrspace(1)* %in) {
>
> Modified: llvm/trunk/test/CodeGen/R600/literals.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/literals.ll?rev=174392&r1=174391&r2=174392&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/R600/literals.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/literals.ll Tue Feb 5 11:09:11 2013
> @@ -6,6 +6,7 @@
> ; or
> ; ADD_INT literal.x REG, 5
>
> +; CHECK; @i32_literal
> ; CHECK: ADD_INT {{[A-Z0-9,. ]*}}literal.x,{{[A-Z0-9,. ]*}} 5
> define void @i32_literal(i32 addrspace(1)* %out, i32 %in) {
> entry:
> @@ -20,6 +21,7 @@ entry:
> ; or
> ; ADD literal.x REG, 5.0
>
> +; CHECK: @float_literal
> ; CHECK: ADD {{[A-Z0-9,. ]*}}literal.x,{{[A-Z0-9,. ]*}} {{[0-9]+}}(5.0
> define void @float_literal(float addrspace(1)* %out, float %in) {
> entry:
>
> Modified: llvm/trunk/test/CodeGen/R600/short-args.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/short-args.ll?rev=174392&r1=174391&r2=174392&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/R600/short-args.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/short-args.ll Tue Feb 5 11:09:11 2013
> @@ -1,5 +1,6 @@
> ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
>
> +; CHECK: @i8_arg
> ; CHECK: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}}
>
> define void @i8_arg(i32 addrspace(1)* nocapture %out, i8 %in) nounwind {
> @@ -9,6 +10,7 @@ entry:
> ret void
> }
>
> +; CHECK: @i8_zext_arg
> ; CHECK: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}}
>
> define void @i8_zext_arg(i32 addrspace(1)* nocapture %out, i8 zeroext %in) nounwind {
> @@ -18,6 +20,7 @@ entry:
> ret void
> }
>
> +; CHECK: @i16_arg
> ; CHECK: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}}
>
> define void @i16_arg(i32 addrspace(1)* nocapture %out, i16 %in) nounwind {
> @@ -27,6 +30,7 @@ entry:
> ret void
> }
>
> +; CHECK: @i16_zext_arg
> ; CHECK: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}}
>
> define void @i16_zext_arg(i32 addrspace(1)* nocapture %out, i16 zeroext %in) nounwind {
>
> Modified: llvm/trunk/test/CodeGen/R600/vec4-expand.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/vec4-expand.ll?rev=174392&r1=174391&r2=174392&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/R600/vec4-expand.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/vec4-expand.ll Tue Feb 5 11:09:11 2013
> @@ -1,5 +1,6 @@
> ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
>
> +; CHECK: @fp_to_sint
> ; CHECK: FLT_TO_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> ; CHECK: FLT_TO_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> ; CHECK: FLT_TO_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> @@ -12,6 +13,7 @@ define void @fp_to_sint(<4 x i32> addrsp
> ret void
> }
>
> +; CHECK: @fp_to_uint
> ; CHECK: FLT_TO_UINT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> ; CHECK: FLT_TO_UINT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> ; CHECK: FLT_TO_UINT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> @@ -24,6 +26,7 @@ define void @fp_to_uint(<4 x i32> addrsp
> ret void
> }
>
> +; CHECK: @sint_to_fp
> ; CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> ; CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> ; CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> @@ -36,6 +39,7 @@ define void @sint_to_fp(<4 x float> addr
> ret void
> }
>
> +; CHECK: @uint_to_fp
> ; CHECK: UINT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> ; CHECK: UINT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> ; CHECK: UINT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
More information about the llvm-commits
mailing list