[llvm] r174387 - Fix signed-unsigned comparison warning.

Tim Northover Tim.Northover at arm.com
Tue Feb 5 08:40:06 PST 2013


Author: tnorthover
Date: Tue Feb  5 10:40:06 2013
New Revision: 174387

URL: http://llvm.org/viewvc/llvm-project?rev=174387&view=rev
Log:
Fix signed-unsigned comparison warning.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp

Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=174387&r1=174386&r2=174387&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Tue Feb  5 10:40:06 2013
@@ -2389,8 +2389,10 @@ static SDValue PerformATOMIC_FENCECombin
   if (!AtomicNode)
     return SDValue();
 
-  uint64_t FenceOrder = FenceNode->getConstantOperandVal(1);
-  uint64_t FenceScope = FenceNode->getConstantOperandVal(2);
+  AtomicOrdering FenceOrder
+    = static_cast<AtomicOrdering>(FenceNode->getConstantOperandVal(1));
+  SynchronizationScope FenceScope
+    = static_cast<SynchronizationScope>(FenceNode->getConstantOperandVal(2));
 
   if (FenceOrder != Acquire || FenceScope != AtomicNode->getSynchScope())
     return SDValue();
@@ -2409,7 +2411,7 @@ static SDValue PerformATOMIC_FENCECombin
                              Chain,                  // Chain
                              AtomicOp.getOperand(1), // Pointer
                              AtomicNode->getMemOperand(), Acquire,
-                             static_cast<SynchronizationScope>(FenceScope));
+                             FenceScope);
 
   if (AtomicNode->getOpcode() == ISD::ATOMIC_LOAD)
     DAG.ReplaceAllUsesWith(AtomicNode, Op.getNode());
@@ -2428,10 +2430,10 @@ static SDValue PerformATOMIC_STORECombin
   if (FenceOp.getOpcode() != ISD::ATOMIC_FENCE)
     return SDValue();
 
-  uint64_t FenceOrder
-    = cast<ConstantSDNode>(FenceOp.getOperand(1))->getZExtValue();
-  uint64_t FenceScope
-    = cast<ConstantSDNode>(FenceOp.getOperand(2))->getZExtValue();
+  AtomicOrdering FenceOrder
+    = static_cast<AtomicOrdering>(FenceOp->getConstantOperandVal(1));
+  SynchronizationScope FenceScope
+    = static_cast<SynchronizationScope>(FenceOp->getConstantOperandVal(2));
 
   if (FenceOrder != Release || FenceScope != AtomicNode->getSynchScope())
     return SDValue();
@@ -2442,7 +2444,7 @@ static SDValue PerformATOMIC_STORECombin
                        AtomicNode->getOperand(1),       // Pointer
                        AtomicNode->getOperand(2),       // Value
                        AtomicNode->getMemOperand(), Release,
-                       static_cast<SynchronizationScope>(FenceScope));
+                       FenceScope);
 }
 
 /// For a true bitfield insert, the bits getting into that contiguous mask





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