[llvm] r174086 - Update AArch64 backend to changed eliminateFrameIndex interface.
Tim Northover
Tim.Northover at arm.com
Thu Jan 31 12:46:54 PST 2013
Author: tnorthover
Date: Thu Jan 31 14:46:53 2013
New Revision: 174086
URL: http://llvm.org/viewvc/llvm-project?rev=174086&view=rev
Log:
Update AArch64 backend to changed eliminateFrameIndex interface.
Modified:
llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp
llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.h
Modified: llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp?rev=174086&r1=174085&r2=174086&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp Thu Jan 31 14:46:53 2013
@@ -78,7 +78,9 @@ AArch64RegisterInfo::getReservedRegs(con
void
AArch64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MBBI,
- int SPAdj, RegScavenger *RS) const {
+ int SPAdj,
+ unsigned FIOperandNum,
+ RegScavenger *RS) const {
assert(SPAdj == 0 && "Cannot deal with nonzero SPAdj yet");
MachineInstr &MI = *MBBI;
MachineBasicBlock &MBB = *MI.getParent();
@@ -87,12 +89,6 @@ AArch64RegisterInfo::eliminateFrameIndex
const AArch64FrameLowering *TFI =
static_cast<const AArch64FrameLowering *>(MF.getTarget().getFrameLowering());
- unsigned i = 0;
- while (!MI.getOperand(i).isFI()) {
- ++i;
- assert(i < MI.getNumOperands() && "Instr doesn't have a FrameIndex Operand");
- }
-
// In order to work out the base and offset for addressing, the FrameLowering
// code needs to know (sometimes) whether the instruction is storing/loading a
// callee-saved register, or whether it's a more generic
@@ -107,7 +103,7 @@ AArch64RegisterInfo::eliminateFrameIndex
MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
}
- int FrameIndex = MI.getOperand(i).getIndex();
+ int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
bool IsCalleeSaveOp = FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI;
unsigned FrameReg;
@@ -115,13 +111,13 @@ AArch64RegisterInfo::eliminateFrameIndex
Offset = TFI->resolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj,
IsCalleeSaveOp);
- Offset += MI.getOperand(i+1).getImm();
+ Offset += MI.getOperand(FIOperandNum + 1).getImm();
// DBG_VALUE instructions have no real restrictions so they can be handled
// easily.
if (MI.isDebugValue()) {
- MI.getOperand(i).ChangeToRegister(FrameReg, /*isDef=*/ false);
- MI.getOperand(i+1).ChangeToImmediate(Offset);
+ MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, /*isDef=*/ false);
+ MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
return;
}
@@ -151,8 +147,8 @@ AArch64RegisterInfo::eliminateFrameIndex
// now this checks nothing has gone horribly wrong.
assert(Offset >= 0 && "Unexpected negative offset from SP");
- MI.getOperand(i).ChangeToRegister(FrameReg, false, false, true);
- MI.getOperand(i+1).ChangeToImmediate(Offset / OffsetScale);
+ MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false, false, true);
+ MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset / OffsetScale);
}
void
Modified: llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.h?rev=174086&r1=174085&r2=174086&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.h (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.h Thu Jan 31 14:46:53 2013
@@ -41,6 +41,7 @@ public:
unsigned getFrameRegister(const MachineFunction &MF) const;
void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
+ unsigned FIOperandNum,
RegScavenger *Rs = NULL) const;
void eliminateCallFramePseudoInstr(MachineFunction &MF,
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