[llvm] r173863 - [mips] Test case for r173862.
Akira Hatanaka
ahatanaka at mips.com
Tue Jan 29 16:28:16 PST 2013
Author: ahatanak
Date: Tue Jan 29 18:28:15 2013
New Revision: 173863
URL: http://llvm.org/viewvc/llvm-project?rev=173863&view=rev
Log:
[mips] Test case for r173862.
Patch by Sasa Stankovic.
Added:
llvm/trunk/test/CodeGen/Mips/eh-return32.ll
llvm/trunk/test/CodeGen/Mips/eh-return64.ll
Added: llvm/trunk/test/CodeGen/Mips/eh-return32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/eh-return32.ll?rev=173863&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/eh-return32.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/eh-return32.ll Tue Jan 29 18:28:15 2013
@@ -0,0 +1,81 @@
+; RUN: llc -march=mipsel -mcpu=mips32 < %s | FileCheck %s
+
+declare void @llvm.eh.return.i32(i32, i8*)
+declare void @foo(...)
+
+define i8* @f1(i32 %offset, i8* %handler) {
+entry:
+ call void (...)* @foo()
+ call void @llvm.eh.return.i32(i32 %offset, i8* %handler)
+ unreachable
+
+; CHECK: f1
+; CHECK: addiu $sp, $sp, -[[spoffset:[0-9]+]]
+
+; check that $a0-$a3 are saved on stack.
+; CHECK: sw $4, [[offset0:[0-9]+]]($sp)
+; CHECK: sw $5, [[offset1:[0-9]+]]($sp)
+; CHECK: sw $6, [[offset2:[0-9]+]]($sp)
+; CHECK: sw $7, [[offset3:[0-9]+]]($sp)
+
+; check that .cfi_offset directives are emitted for $a0-$a3.
+; CHECK: .cfi_offset 4,
+; CHECK: .cfi_offset 5,
+; CHECK: .cfi_offset 6,
+; CHECK: .cfi_offset 7,
+
+; check that stack adjustment and handler are put in $v1 and $v0.
+; CHECK: or $[[R0:[a-z0-9]+]], $5, $zero
+; CHECK: or $[[R1:[a-z0-9]+]], $4, $zero
+; CHECK: or $3, $[[R1]], $zero
+; CHECK: or $2, $[[R0]], $zero
+
+; check that $a0-$a3 are restored from stack.
+; CHECK: lw $4, [[offset0]]($sp)
+; CHECK: lw $5, [[offset1]]($sp)
+; CHECK: lw $6, [[offset2]]($sp)
+; CHECK: lw $7, [[offset3]]($sp)
+
+; check that stack is adjusted by $v1 and that code returns to address in $v0
+; CHECK: addiu $sp, $sp, [[spoffset]]
+; CHECK: or $ra, $2, $zero
+; CHECK: jr $ra
+; CHECK: addu $sp, $sp, $3
+}
+
+define i8* @f2(i32 %offset, i8* %handler) {
+entry:
+ call void @llvm.eh.return.i32(i32 %offset, i8* %handler)
+ unreachable
+
+; CHECK: f2
+; CHECK: addiu $sp, $sp, -[[spoffset:[0-9]+]]
+
+; check that $a0-$a3 are saved on stack.
+; CHECK: sw $4, [[offset0:[0-9]+]]($sp)
+; CHECK: sw $5, [[offset1:[0-9]+]]($sp)
+; CHECK: sw $6, [[offset2:[0-9]+]]($sp)
+; CHECK: sw $7, [[offset3:[0-9]+]]($sp)
+
+; check that .cfi_offset directives are emitted for $a0-$a3.
+; CHECK: .cfi_offset 4,
+; CHECK: .cfi_offset 5,
+; CHECK: .cfi_offset 6,
+; CHECK: .cfi_offset 7,
+
+; check that stack adjustment and handler are put in $v1 and $v0.
+; CHECK: or $3, $4, $zero
+; CHECK: or $2, $5, $zero
+
+; check that $a0-$a3 are restored from stack.
+; CHECK: lw $4, [[offset0]]($sp)
+; CHECK: lw $5, [[offset1]]($sp)
+; CHECK: lw $6, [[offset2]]($sp)
+; CHECK: lw $7, [[offset3]]($sp)
+
+; check that stack is adjusted by $v1 and that code returns to address in $v0
+; CHECK: addiu $sp, $sp, [[spoffset]]
+; CHECK: or $ra, $2, $zero
+; CHECK: jr $ra
+; CHECK: addu $sp, $sp, $3
+}
Added: llvm/trunk/test/CodeGen/Mips/eh-return64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/eh-return64.ll?rev=173863&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/eh-return64.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/eh-return64.ll Tue Jan 29 18:28:15 2013
@@ -0,0 +1,83 @@
+; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s
+
+declare void @llvm.eh.return.i64(i64, i8*)
+declare void @foo(...)
+
+define void @f1(i64 %offset, i8* %handler) {
+entry:
+ call void (...)* @foo()
+ call void @llvm.eh.return.i64(i64 %offset, i8* %handler)
+ unreachable
+
+; CHECK: f1
+; CHECK: daddiu $sp, $sp, -[[spoffset:[0-9]+]]
+
+; check that $a0-$a3 are saved on stack.
+; CHECK: sd $4, [[offset0:[0-9]+]]($sp)
+; CHECK: sd $5, [[offset1:[0-9]+]]($sp)
+; CHECK: sd $6, [[offset2:[0-9]+]]($sp)
+; CHECK: sd $7, [[offset3:[0-9]+]]($sp)
+
+; check that .cfi_offset directives are emitted for $a0-$a3.
+; CHECK: .cfi_offset 4,
+; CHECK: .cfi_offset 5,
+; CHECK: .cfi_offset 6,
+; CHECK: .cfi_offset 7,
+
+; check that stack adjustment and handler are put in $v1 and $v0.
+; CHECK: or $[[R0:[a-z0-9]+]], $5, $zero
+; CHECK: or $[[R1:[a-z0-9]+]], $4, $zero
+; CHECK: or $3, $[[R1]], $zero
+; CHECK: or $2, $[[R0]], $zero
+
+; check that $a0-$a3 are restored from stack.
+; CHECK: ld $4, [[offset0]]($sp)
+; CHECK: ld $5, [[offset1]]($sp)
+; CHECK: ld $6, [[offset2]]($sp)
+; CHECK: ld $7, [[offset3]]($sp)
+
+; check that stack is adjusted by $v1 and that code returns to address in $v0
+; CHECK: daddiu $sp, $sp, [[spoffset]]
+; CHECK: or $ra, $2, $zero
+; CHECK: jr $ra
+; CHECK: daddu $sp, $sp, $3
+
+}
+
+define void @f2(i64 %offset, i8* %handler) {
+entry:
+ call void @llvm.eh.return.i64(i64 %offset, i8* %handler)
+ unreachable
+
+; CHECK: f2
+; CHECK: daddiu $sp, $sp, -[[spoffset:[0-9]+]]
+
+; check that $a0-$a3 are saved on stack.
+; CHECK: sd $4, [[offset0:[0-9]+]]($sp)
+; CHECK: sd $5, [[offset1:[0-9]+]]($sp)
+; CHECK: sd $6, [[offset2:[0-9]+]]($sp)
+; CHECK: sd $7, [[offset3:[0-9]+]]($sp)
+
+; check that .cfi_offset directives are emitted for $a0-$a3.
+; CHECK: .cfi_offset 4,
+; CHECK: .cfi_offset 5,
+; CHECK: .cfi_offset 6,
+; CHECK: .cfi_offset 7,
+
+; check that stack adjustment and handler are put in $v1 and $v0.
+; CHECK: or $3, $4, $zero
+; CHECK: or $2, $5, $zero
+
+; check that $a0-$a3 are restored from stack.
+; CHECK: ld $4, [[offset0]]($sp)
+; CHECK: ld $5, [[offset1]]($sp)
+; CHECK: ld $6, [[offset2]]($sp)
+; CHECK: ld $7, [[offset3]]($sp)
+
+; check that stack is adjusted by $v1 and that code returns to address in $v0
+; CHECK: daddiu $sp, $sp, [[spoffset]]
+; CHECK: or $ra, $2, $zero
+; CHECK: jr $ra
+; CHECK: daddu $sp, $sp, $3
+
+}
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