[llvm-commits] Fixing Bug 13662: paired register for inline asm with 64-bit data on ARM
Zhao, Weiming
weimingz at quicinc.com
Tue Jan 29 11:03:35 PST 2013
Hi Andrew,
Sorry, I forgot to attach the patch in previous mail.
From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Weiming Zhao
Sent: Saturday, January 26, 2013 2:45 PM
To: 'Jakob Stoklund Olesen'; atrick at apple.com
Cc: llvm-commits at cs.uiuc.edu
Subject: Re: [llvm-commits] Fixing Bug 13662: paired register for inline asm with 64-bit data on ARM
Hi Andrew,
Could you please review the patch?
This patch adds a special handling case for CopyFromReg of Untyped in ScheduleDAGRRList.cpp::GetCostForDef().
Thanks,
Weiming
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
From: Weiming Zhao [mailto:weimingz at codeaurora.org]
Sent: Friday, January 25, 2013 3:50 PM
To: 'Jakob Stoklund Olesen'
Cc: 'llvm-commits at cs.uiuc.edu'
Subject: RE: [llvm-commits] Fixing Bug 13662: paired register for inline asm with 64-bit data on ARM
Hi Jakob,
Attached is the patch for fixing CopyFromReg in scheduler.
With this change, I'm able to implement GPRPair in inlineAsm without touching any other target independent part.
Please help to review it.
Thanks,
Weiming
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
From: Jakob Stoklund Olesen [mailto:stoklund at 2pi.dk]
Sent: Friday, January 25, 2013 9:22 AM
To: weimingz at codeaurora.org<mailto:weimingz at codeaurora.org>
Cc: llvm-commits at cs.uiuc.edu<mailto:llvm-commits at cs.uiuc.edu>
Subject: Re: [llvm-commits] Fixing Bug 13662: paired register for inline asm with 64-bit data on ARM
On Jan 24, 2013, at 5:46 PM, "Weiming Zhao" <weimingz at codeaurora.org<mailto:weimingz at codeaurora.org>> wrote:
Hi Jakob,
First, I'm really sorry for late repose. I was really busy on other parts of LLVM in the past few weeks.
CopyFromReg can't take a Untyped VT because ScheduleDAGRRList.cpp::GetCostForDef() expects MachineOpCode for Untyped node, while CopyFromReg is not a MachineOpCode:
static void GetCostForDef(...) {
MVT VT = RegDefPos.GetValue();
// Special handling for untyped values. These values can only come from
// the expansion of custom DAG-to-DAG patterns.
if (VT == MVT::Untyped) {
const SDNode *Node = RegDefPos.GetNode();
unsigned Opcode = Node->getMachineOpcode(); --> CopyFromReg is not a MachineOpcode()
This is why I'm avoiding using CopyFromReg for Untyped.
I think it is fine to add support for untyped CopyFromReg nodes there. You can get the register class from the virtual source register, and otherwise handle it the same way REG_SEQUENCE is handled.
Please make that change in a separate patch.
/jakob
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