[llvm-commits] [RFC] Towards an assembler parser for PowerPC

[Ulrich Weigand]

Bill Schmidt <wschmidt at linux.vnet.ibm.com> wrote on 21.01.2013 14:30:42:

> So current code never generates a bclr?  That's kind of sad, as there
> are generally lots of opportunities to do so.  We'll need this
> eventually, but it sounds like the alias approach is promising.

Yes, that's the way it seems to be right now ...


> Just a curiosity question:  Why isn't there a similar problem with
> load-update forms?

The load-update forms are handled completely via custom select of
(indexed) ISD::LOAD in PPCDAGToDAGISel::Select.  The store-update
forms are instead handled via TableGen patterns matching indexed
ISD::STORE; see "istore", "pre_store", "pre_truncst" et.al. in
include/llvm/Target/TargetSelectionDAG.td

I guess we could ignore those patterns and instead handle store
just like load via custom select.  On the other hand, I'd assumed
that the general direction ought to be to move *away* from custom
select towards automatic select via TableGen, so this would seem
a way backwards ...


> Thanks again for all the excellent work on this!

Thanks for the review!


Bye,
Ulrich