[llvm-commits] [llvm] r172496 - in /llvm/trunk: lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp test/MC/Mips/elf-gprel-32-64.ll
Jack Carter
jcarter at mips.com
Mon Jan 14 17:08:03 PST 2013
Author: jacksprat
Date: Mon Jan 14 19:08:02 2013
New Revision: 172496
URL: http://llvm.org/viewvc/llvm-project?rev=172496&view=rev
Log:
This patch fixes a Mips specific bug where
we need to generate a N64 compound relocation
R_MIPS_GPREL_32/R_MIPS_64/R_MIPS_NONE.
The bug was exposed by the SingleSourcetest case
DuffsDevice.c.
Contributer: Jack Carter
Added:
llvm/trunk/test/MC/Mips/elf-gprel-32-64.ll
Modified:
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp?rev=172496&r1=172495&r2=172496&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp Mon Jan 14 19:08:02 2013
@@ -108,7 +108,13 @@
Type = ELF::R_MIPS_64;
break;
case FK_GPRel_4:
- Type = ELF::R_MIPS_GPREL32;
+ if (isN64()) {
+ Type = setRType((unsigned)ELF::R_MIPS_GPREL32, Type);
+ Type = setRType2((unsigned)ELF::R_MIPS_64, Type);
+ Type = setRType3((unsigned)ELF::R_MIPS_NONE, Type);
+ }
+ else
+ Type = ELF::R_MIPS_GPREL32;
break;
case Mips::fixup_Mips_GPREL16:
Type = ELF::R_MIPS_GPREL16;
Added: llvm/trunk/test/MC/Mips/elf-gprel-32-64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/elf-gprel-32-64.ll?rev=172496&view=auto
==============================================================================
--- llvm/trunk/test/MC/Mips/elf-gprel-32-64.ll (added)
+++ llvm/trunk/test/MC/Mips/elf-gprel-32-64.ll Mon Jan 14 19:08:02 2013
@@ -0,0 +1,37 @@
+; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64 %s -o - \
+; RUN: | elf-dump --dump-section-data \
+; RUN: | FileCheck %s
+
+define i32 @test(i32 %c) nounwind {
+entry:
+ switch i32 %c, label %sw.default [
+ i32 0, label %sw.bb
+ i32 1, label %sw.bb2
+ i32 2, label %sw.bb5
+ i32 3, label %sw.bb8
+ ]
+
+sw.bb:
+ br label %return
+sw.bb2:
+ br label %return
+sw.bb5:
+ br label %return
+sw.bb8:
+ br label %return
+sw.default:
+ br label %return
+
+return:
+ %retval.0 = phi i32 [ -1, %sw.default ], [ 7, %sw.bb8 ], [ 2, %sw.bb5 ], [ 3, %sw.bb2 ], [ 1, %sw.bb ]
+ ret i32 %retval.0
+}
+
+; Check that the appropriate relocations were created.
+
+; R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
+; CHECK: (('sh_name', 0x{{[a-z0-9]+}}) # '.rela.rodata'
+; CHECK: ('r_type3', 0x00)
+; CHECK-NEXT: ('r_type2', 0x12)
+; CHECK-NEXT: ('r_type', 0x0c)
+
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