[llvm-commits] [llvm] r171946 - in /llvm/trunk: include/llvm/CodeGen/TargetSchedule.h include/llvm/MC/MCSchedule.h include/llvm/Target/TargetSchedule.td lib/CodeGen/MachineScheduler.cpp lib/Target/ARM/ARMScheduleA9.td lib/Target/X86/X86Schedule.td lib/Target/X86/X86ScheduleAtom.td test/CodeGen/ARM/misched-inorder-latency.ll test/CodeGen/PowerPC/misched-inorder-latency.ll utils/TableGen/SubtargetEmitter.cpp

[Andrew Trick]

On Jan 11, 2013, at 9:38 AM, Hal Finkel <hfinkel at anl.gov> wrote:

> ----- Original Message -----
>> From: "Andrew Trick" <atrick at apple.com>
>> To: llvm-commits at cs.uiuc.edu
>> Sent: Tuesday, January 8, 2013 9:36:49 PM
>> Subject: [llvm-commits] [llvm] r171946 - in /llvm/trunk: include/llvm/CodeGen/TargetSchedule.h
>> include/llvm/MC/MCSchedule.h include/llvm/Target/TargetSchedule.td lib/CodeGen/MachineScheduler.cpp
>> lib/Target/ARM/ARMScheduleA9.td lib/Target/X86/X86Schedule.td lib/Target/X86/X86ScheduleAtom.td
>> test/CodeGen/ARM/misched-inorder-latency.ll test/CodeGen/PowerPC/misched-inorder-latency.ll
>> utils/TableGen/SubtargetEmitter.cpp
>> 
>> Author: atrick
>> Date: Tue Jan  8 21:36:49 2013
>> New Revision: 171946
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=171946&view=rev
>> Log:
>> MIsched: add an ILP window property to machine model.
>> 
>> This was an experimental option, but needs to be defined
>> per-target. e.g. PPC A2 needs to aggressively hide latency.
>> 
>> I converted some in-order scheduling tests to A2. Hal is working on
>> more test cases.
> 
> Andy, thanks!
> 
> Also, do you want to do the same thing with enable-aa-sched-mi?

Please add a target hook if you'd like. We still want a command line option for toggling this, and it doesn't need to be in the machine model. It's just a default policy that can be overridden by subtargets.

-Andy