[llvm-commits] [llvm] r171608 - in /llvm/trunk: lib/Target/X86/X86InstrArithmetic.td test/CodeGen/X86/early-ifcvt.ll
Craig Topper
craig.topper at gmail.com
Fri Jan 4 23:39:25 PST 2013
Author: ctopper
Date: Sat Jan 5 01:39:25 2013
New Revision: 171608
URL: http://llvm.org/viewvc/llvm-project?rev=171608&view=rev
Log:
Recommit r171461 which was incorrectly reverted. Mark DIV/IDIV instructions hasSideEffects=1 because they can trap when dividing by 0. This is needed to keep early if conversion from moving them across basic blocks.
Modified:
llvm/trunk/lib/Target/X86/X86InstrArithmetic.td
llvm/trunk/test/CodeGen/X86/early-ifcvt.ll
Modified: llvm/trunk/lib/Target/X86/X86InstrArithmetic.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrArithmetic.td?rev=171608&r1=171607&r2=171608&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrArithmetic.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrArithmetic.td Sat Jan 5 01:39:25 2013
@@ -266,7 +266,7 @@
// unsigned division/remainder
-let hasSideEffects = 0 in {
+let hasSideEffects = 1 in { // so that we don't speculatively execute
let Defs = [AL,EFLAGS,AX], Uses = [AX] in
def DIV8r : I<0xF6, MRM6r, (outs), (ins GR8:$src), // AX/r8 = AL,AH
"div{b}\t$src", [], IIC_DIV8_REG>;
Modified: llvm/trunk/test/CodeGen/X86/early-ifcvt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/early-ifcvt.ll?rev=171608&r1=171607&r2=171608&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/early-ifcvt.ll (original)
+++ llvm/trunk/test/CodeGen/X86/early-ifcvt.ll Sat Jan 5 01:39:25 2013
@@ -142,3 +142,34 @@
}
declare void @BZ2_bz__AssertH__fail()
+
+; Make sure we don't speculate on div/idiv instructions
+; CHECK: test_idiv
+; CHECK-NOT: cmov
+define i32 @test_idiv(i32 %a, i32 %b) nounwind uwtable readnone ssp {
+ %1 = icmp eq i32 %b, 0
+ br i1 %1, label %4, label %2
+
+; <label>:2 ; preds = %0
+ %3 = sdiv i32 %a, %b
+ br label %4
+
+; <label>:4 ; preds = %0, %2
+ %5 = phi i32 [ %3, %2 ], [ %a, %0 ]
+ ret i32 %5
+}
+
+; CHECK: test_div
+; CHECK-NOT: cmov
+define i32 @test_div(i32 %a, i32 %b) nounwind uwtable readnone ssp {
+ %1 = icmp eq i32 %b, 0
+ br i1 %1, label %4, label %2
+
+; <label>:2 ; preds = %0
+ %3 = udiv i32 %a, %b
+ br label %4
+
+; <label>:4 ; preds = %0, %2
+ %5 = phi i32 [ %3, %2 ], [ %a, %0 ]
+ ret i32 %5
+}
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