[llvm-commits] Fixing Bug 13662: paired register for inline asm with 64-bit data on ARM

[Jakob Stoklund Olesen]

On Dec 19, 2012, at 4:22 PM, Weiming Zhao <weimingz at codeaurora.org> wrote:

> The change to InstrEmitter is to let it support ExtractSubReg / RegSequence to be connected to RegisterNode and  CopyFrom node to be connected to a SubReg SDNode.
>  
> Normally, ExtractSubReg/RegSequence are only connected to a SDValue, but for inlineasem, we have to connect them to a VR.
> Existing inlineasm just emits multiple 32bit-typed VRs, it doesn’t need ExtractSubReg/RegSequence, so such scenarios are not encountered.
>  
> Now, this issue is exposed .
> So my patch let it handle more cases. It should be safe.

It is important that you understand how data dependencies are modeled in SelectionDAG. They must be represented by DAG edges, and RegisterSDNode doesn't provide a DAG edge.

Calls and inline-asm nodes get their arguments from virtual or physical registers via RegisterSDNode arguments, but that only works because those registers are read or written by CopyToReg and/or CopyFromReg nodes that are *glued* to the call/asm nodes. The DAG edges carrying the data dependencies are provided by the CopyToReg / CopyFromReg nodes.

You can't simply allow REG_SEQUENCE and EXTRACT_SUBREG to operate on RegisterSDNodes since there is no DAG edge providing the data dependency. It would be completely unsafe to allow such DAG constructs.

It is also entirely unnecessary. You can feed your REG_SEQUENCE DAG edge into the CopyToReg node that is glued to an inline-asm node, and you can EXTRACT_SUBREG from a similarly glued CopyFromReg.

/jakob

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20130103/e22f7733/attachment.html>