[llvm-commits] [llvm] r170620 - in /llvm/trunk/lib/Target/R600: AMDILCFGStructurizer.cpp R600InstrInfo.cpp SIInstrInfo.cpp

[Owen Anderson]

On Dec 19, 2012, at 4:22 PM, NAKAMURA Takumi <geek4civic at gmail.com> wrote:

> Modified: llvm/trunk/lib/Target/R600/R600InstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600InstrInfo.cpp?rev=170620&r1=170619&r2=170620&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/R600/R600InstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/R600/R600InstrInfo.cpp Wed Dec 19 18:22:11 2012
> @@ -72,10 +72,11 @@
> MachineInstr * R600InstrInfo::getMovImmInstr(MachineFunction *MF,
>                                              unsigned DstReg, int64_t Imm) const {
>   MachineInstr * MI = MF->CreateMachineInstr(get(AMDGPU::MOV), DebugLoc());
> -  MachineInstrBuilder(MI).addReg(DstReg, RegState::Define);
> -  MachineInstrBuilder(MI).addReg(AMDGPU::ALU_LITERAL_X);
> -  MachineInstrBuilder(MI).addImm(Imm);
> -  MachineInstrBuilder(MI).addReg(0); // PREDICATE_BIT
> +  MachineInstrBuilder MIB(*MF, MI);
> +  MIB.addReg(DstReg, RegState::Define);
> +  MIB.addReg(AMDGPU::ALU_LITERAL_X);
> +  MIB.addImm(Imm);
> +  MIB.addReg(0); // PREDICATE_BIT
> 

You guys should really consider using BuildMI() for things like this.  Here's an example from ARMLoadStoreOptimizer.cpp:

    BuildMI(MBB, MBBI, dl, TII->get(BaseOpc), NewBase)
      .addReg(Base, getKillRegState(BaseKill))
      .addImm(Offset)
      .addImm(Pred)
      .addReg(PredReg)
      .addReg(0);

--Owen