[llvm-commits] [llvm] r170289 - /llvm/trunk/lib/Target/XCore/XCoreInstrFormats.td

[Richard Osborne]

Author: friedgold
Date: Sun Dec 16 10:46:24 2012
New Revision: 170289

URL: http://llvm.org/viewvc/llvm-project?rev=170289&view=rev
Log:
Set instruction size correctly in XCoreInstrFormats.td

Modified:
    llvm/trunk/lib/Target/XCore/XCoreInstrFormats.td

Modified: llvm/trunk/lib/Target/XCore/XCoreInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrFormats.td?rev=170289&r1=170288&r2=170289&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreInstrFormats.td (original)
+++ llvm/trunk/lib/Target/XCore/XCoreInstrFormats.td Sun Dec 16 10:46:24 2012
@@ -10,7 +10,7 @@
 //===----------------------------------------------------------------------===//
 // Instruction format superclass
 //===----------------------------------------------------------------------===//
-class InstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
+class InstXCore<int sz, dag outs, dag ins, string asmstr, list<dag> pattern>
     : Instruction {
   field bits<32> Inst;
 
@@ -19,102 +19,103 @@
   dag InOperandList = ins;
   let AsmString   = asmstr;
   let Pattern = pattern;
+  let Size = sz;
 }
 
 // XCore pseudo instructions format
 class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
-   : InstXCore<outs, ins, asmstr, pattern>;
+   : InstXCore<0, outs, ins, asmstr, pattern>;
 
 //===----------------------------------------------------------------------===//
 // Instruction formats
 //===----------------------------------------------------------------------===//
 
 class _F3R<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<2, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }
 
 class _FL3R<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<4, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }
 
 class _F2RUS<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<2, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }
 
 class _FL2RUS<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<4, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }
 
 class _FRU6<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<2, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }
 
 class _FLRU6<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<4, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }
 
 class _FU6<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<2, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }
 
 class _FLU6<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<4, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }
 
 class _FU10<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<2, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }
 
 class _FLU10<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<4, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }
 
 class _F2R<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<2, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }
 
 class _FRUS<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<2, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }
 
 class _FL2R<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<4, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }
 
 class _F1R<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<2, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }
 
 class _F0R<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<2, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }
 
 class _L4R<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<4, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }
 
 class _L5R<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<4, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }
 
 class _L6R<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : InstXCore<outs, ins, asmstr, pattern> {
+    : InstXCore<4, outs, ins, asmstr, pattern> {
   let Inst{31-0} = 0;
 }