[llvm-commits] [llvm] r170149 - in /llvm/trunk/lib/Target/PowerPC: PPCISelDAGToDAG.cpp PPCISelLowering.cpp PPCInstr64Bit.td
Bill Schmidt
wschmidt at linux.vnet.ibm.com
Thu Dec 13 14:39:52 PST 2012
Ah, actually this is something another guy is looking at, but he has
been busy with other things. It is a matter of some of the buildbot
scripts not acting correctly with regard to -faltivec when building with
GCC, if I recall correctly. It's in his queue and should be fixed
shortly once he understands the issue.
On Thu, 2012-12-13 at 13:06 -0800, Nadav Rotem wrote:
> Bill,
>
> Both PPC64 bots are failing. Maybe you should focus on stabilizing them before you add new features.
>
> http://lab.llvm.org:8011/builders/clang-ppc64-elf-linux
> http://lab.llvm.org:8011/builders/clang-ppc64-elf-linux2
>
> Thanks,
> Nadav
>
>
> On Dec 13, 2012, at 12:57 PM, Bill Schmidt <wschmidt at linux.vnet.ibm.com> wrote:
>
> > Author: wschmidt
> > Date: Thu Dec 13 14:57:10 2012
> > New Revision: 170149
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=170149&view=rev
> > Log:
> > This is another cleanup patch for 64-bit PowerPC TLS processing. I had
> > some hackery in place that hid my poor use of TblGen, which I've now sorted
> > out and cleaned up. No change in observable behavior, so no new test cases.
> >
> > Modified:
> > llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
> > llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
> > llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
> >
> > Modified: llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp?rev=170149&r1=170148&r2=170149&view=diff
> > ==============================================================================
> > --- llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (original)
> > +++ llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Thu Dec 13 14:57:10 2012
> > @@ -1311,53 +1311,6 @@
> > return CurDAG->getMachineNode(PPC::ADDItocL, dl, MVT::i64,
> > SDValue(Tmp, 0), GA);
> > }
> > - case PPCISD::LD_GOT_TPREL: {
> > - assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
> > - return CurDAG->getMachineNode(PPC::LDgotTPREL, dl, MVT::i64,
> > - N->getOperand(0), N->getOperand(1));
> > - }
> > - // FIXME: Try without these. Doesn't seem necessary.
> > - case PPCISD::ADDIS_TLSGD_HA: {
> > - assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
> > - return CurDAG->getMachineNode(PPC::ADDIStlsgdHA, dl, MVT::i64,
> > - N->getOperand(0), N->getOperand(1));
> > - }
> > - case PPCISD::ADDI_TLSGD_L: {
> > - assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
> > - return CurDAG->getMachineNode(PPC::ADDItlsgdL, dl, MVT::i64,
> > - N->getOperand(0), N->getOperand(1));
> > - }
> > - case PPCISD::GET_TLS_ADDR: {
> > - assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
> > - return CurDAG->getMachineNode(PPC::GETtlsADDR, dl, MVT::i64,
> > - N->getOperand(0), N->getOperand(1));
> > - }
> > - case PPCISD::ADDIS_TLSLD_HA: {
> > - assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
> > - return CurDAG->getMachineNode(PPC::ADDIStlsldHA, dl, MVT::i64,
> > - N->getOperand(0), N->getOperand(1));
> > - }
> > - case PPCISD::ADDI_TLSLD_L: {
> > - assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
> > - return CurDAG->getMachineNode(PPC::ADDItlsldL, dl, MVT::i64,
> > - N->getOperand(0), N->getOperand(1));
> > - }
> > - case PPCISD::GET_TLSLD_ADDR: {
> > - assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
> > - return CurDAG->getMachineNode(PPC::GETtlsldADDR, dl, MVT::i64,
> > - N->getOperand(0), N->getOperand(1));
> > - }
> > - case PPCISD::ADDIS_DTPREL_HA: {
> > - assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
> > - return CurDAG->getMachineNode(PPC::ADDISdtprelHA, dl, MVT::i64,
> > - N->getOperand(0), N->getOperand(1),
> > - N->getOperand(2));
> > - }
> > - case PPCISD::ADDI_DTPREL_L: {
> > - assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
> > - return CurDAG->getMachineNode(PPC::ADDIdtprelL, dl, MVT::i64,
> > - N->getOperand(0), N->getOperand(1));
> > - }
> > }
> >
> > return SelectCode(N);
> >
> > Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=170149&r1=170148&r2=170149&view=diff
> > ==============================================================================
> > --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
> > +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Thu Dec 13 14:57:10 2012
> > @@ -1402,7 +1402,7 @@
> > // copies dissolve during subsequent transforms.
> > Chain = DAG.getCopyToReg(Chain, dl, PPC::X3, TLSAddr);
> > SDValue DtvOffsetHi = DAG.getNode(PPCISD::ADDIS_DTPREL_HA, dl, PtrVT,
> > - ParmReg, TGA, Chain);
> > + Chain, ParmReg, TGA);
> > return DAG.getNode(PPCISD::ADDI_DTPREL_L, dl, PtrVT, DtvOffsetHi, TGA);
> > }
> >
> >
> > Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=170149&r1=170148&r2=170149&view=diff
> > ==============================================================================
> > --- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original)
> > +++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Thu Dec 13 14:57:10 2012
> > @@ -723,49 +723,50 @@
> > def LDgotTPREL: Pseudo<(outs G8RC:$rD), (ins tlsaddr:$disp, G8RC:$reg),
> > "#LDgotTPREL",
> > [(set G8RC:$rD,
> > - (PPCldGotTprel G8RC:$reg, tglobaltlsaddr:$disp))]>,
> > + (PPCldGotTprel tglobaltlsaddr:$disp, G8RC:$reg))]>,
> > isPPC64;
> > def : Pat<(PPCaddTls G8RC:$in, tglobaltlsaddr:$g),
> > (ADD8TLS G8RC:$in, tglobaltlsaddr:$g)>;
> > def ADDIStlsgdHA: Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, symbolHi64:$disp),
> > "#ADDIStlsgdHA",
> > [(set G8RC:$rD,
> > - (PPCaddisTlsgdHA G8RC:$reg, tglobaladdr:$disp))]>,
> > + (PPCaddisTlsgdHA G8RC:$reg, tglobaltlsaddr:$disp))]>,
> > isPPC64;
> > def ADDItlsgdL : Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, symbolLo64:$disp),
> > "#ADDItlsgdL",
> > [(set G8RC:$rD,
> > - (PPCaddiTlsgdL G8RC:$reg, tglobaladdr:$disp))]>,
> > + (PPCaddiTlsgdL G8RC:$reg, tglobaltlsaddr:$disp))]>,
> > isPPC64;
> > def GETtlsADDR : Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, tlsgd:$sym),
> > "#GETtlsADDR",
> > [(set G8RC:$rD,
> > - (PPCgetTlsAddr G8RC:$reg, tglobaladdr:$sym))]>,
> > + (PPCgetTlsAddr G8RC:$reg, tglobaltlsaddr:$sym))]>,
> > isPPC64;
> > def ADDIStlsldHA: Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, symbolHi64:$disp),
> > "#ADDIStlsldHA",
> > [(set G8RC:$rD,
> > - (PPCaddisTlsldHA G8RC:$reg, tglobaladdr:$disp))]>,
> > + (PPCaddisTlsldHA G8RC:$reg, tglobaltlsaddr:$disp))]>,
> > isPPC64;
> > def ADDItlsldL : Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, symbolLo64:$disp),
> > "#ADDItlsldL",
> > [(set G8RC:$rD,
> > - (PPCaddiTlsldL G8RC:$reg, tglobaladdr:$disp))]>,
> > + (PPCaddiTlsldL G8RC:$reg, tglobaltlsaddr:$disp))]>,
> > isPPC64;
> > def GETtlsldADDR : Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, tlsgd:$sym),
> > "#GETtlsldADDR",
> > [(set G8RC:$rD,
> > - (PPCgetTlsldAddr G8RC:$reg, tglobaladdr:$sym))]>,
> > + (PPCgetTlsldAddr G8RC:$reg, tglobaltlsaddr:$sym))]>,
> > isPPC64;
> > def ADDISdtprelHA: Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, symbolHi64:$disp),
> > "#ADDISdtprelHA",
> > [(set G8RC:$rD,
> > - (PPCaddisDtprelHA G8RC:$reg, tglobaladdr:$disp))]>,
> > + (PPCaddisDtprelHA G8RC:$reg,
> > + tglobaltlsaddr:$disp))]>,
> > isPPC64;
> > def ADDIdtprelL : Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, symbolLo64:$disp),
> > "#ADDIdtprelL",
> > [(set G8RC:$rD,
> > - (PPCaddiDtprelL G8RC:$reg, tglobaladdr:$disp))]>,
> > + (PPCaddiDtprelL G8RC:$reg, tglobaltlsaddr:$disp))]>,
> > isPPC64;
> >
> > let PPC970_Unit = 2 in {
> >
> >
> > _______________________________________________
> > llvm-commits mailing list
> > llvm-commits at cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
More information about the llvm-commits
mailing list