[llvm-commits] [llvm] r170060 - /llvm/trunk/lib/Target/Mips/MipsInstrFPU.td

[Akira Hatanaka]

Author: ahatanak
Date: Wed Dec 12 18:46:23 2012
New Revision: 170060

URL: http://llvm.org/viewvc/llvm-project?rev=170060&view=rev
Log:
[mips] Set isCommutable flag in a more explicit way.
 

Modified:
    llvm/trunk/lib/Target/Mips/MipsInstrFPU.td

Modified: llvm/trunk/lib/Target/Mips/MipsInstrFPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrFPU.td?rev=170060&r1=170059&r2=170060&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrFPU.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrFPU.td Wed Dec 12 18:46:23 2012
@@ -137,8 +137,7 @@
   }
 }
 
-multiclass FFR2P_M<bits<6> funct, string opstr, SDNode OpNode, bit isComm = 0> {
-  let isCommutable = isComm in {
+multiclass FFR2P_M<bits<6> funct, string opstr, SDNode OpNode> {
   def _D32 : FFR2P<funct, 17, opstr, AFGR64, OpNode>,
              Requires<[NotFP64bit, HasStdEnc]>;
   def _D64 : FFR2P<funct, 17, opstr, FGR64, OpNode>,
@@ -146,7 +145,6 @@
     let DecoderNamespace = "Mips64";
   }
 }
-}
 
 // FP madd/msub/nmadd/nmsub instruction classes.
 class FMADDSUB<bits<3> funct, bits<3> fmt, string opstr,
@@ -325,11 +323,11 @@
 
 /// Floating-point Aritmetic
 def FADD_S : FFR2P<0x00, 16, "add.s", FGR32, fadd>, IsCommutable;
-defm FADD : FFR2P_M<0x00, "add.d", fadd, 1>;
+defm FADD : FFR2P_M<0x00, "add.d", fadd>, IsCommutable;
 def FDIV_S : FFR2P<0x03, 16, "div.s", FGR32, fdiv>;
 defm FDIV : FFR2P_M<0x03, "div.d", fdiv>;
 def FMUL_S : FFR2P<0x02, 16, "mul.s", FGR32, fmul>, IsCommutable;
-defm FMUL : FFR2P_M<0x02, "mul.d", fmul, 1>;
+defm FMUL : FFR2P_M<0x02, "mul.d", fmul>, IsCommutable;
 def FSUB_S : FFR2P<0x01, 16, "sub.s", FGR32, fsub>;
 defm FSUB : FFR2P_M<0x01, "sub.d", fsub>;