[llvm-commits] [llvm] r169516 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/X86/2012-12-06-python27-miscompile.ll

[Nadav Rotem]

Author: nadav
Date: Thu Dec  6 11:34:13 2012
New Revision: 169516

URL: http://llvm.org/viewvc/llvm-project?rev=169516&view=rev
Log:
Fix a bug in the code that merges consecutive stores. Previously we did not
check if loads that happen in between stores alias with the first store in the
chain, only with the second store onwards.


Added:
    llvm/trunk/test/CodeGen/X86/2012-12-06-python27-miscompile.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=169516&r1=169515&r2=169516&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Dec  6 11:34:13 2012
@@ -7613,9 +7613,9 @@
     // information to check if it interferes with anything.
     SDNode *NextInChain = Index->getChain().getNode();
     while (1) {
-      if (isa<StoreSDNode>(NextInChain)) {
+      if (StoreSDNode *STn = dyn_cast<StoreSDNode>(NextInChain)) {
         // We found a store node. Use it for the next iteration.
-        Index = cast<StoreSDNode>(NextInChain);
+        Index = STn;
         break;
       } else if (LoadSDNode *Ldn = dyn_cast<LoadSDNode>(NextInChain)) {
         // Save the load node for later. Continue the scan.
@@ -7641,10 +7641,15 @@
   // store memory address.
   unsigned LastConsecutiveStore = 0;
   int64_t StartAddress = StoreNodes[0].OffsetFromBase;
-  for (unsigned i = 1, e = StoreNodes.size(); i < e; ++i) {
-    int64_t CurrAddress = StoreNodes[i].OffsetFromBase;
-    if (CurrAddress - StartAddress != (ElementSizeBytes * i))
-      break;
+  for (unsigned i = 0, e = StoreNodes.size(); i < e; ++i) {
+
+    // Check that the addresses are consecutive starting from the second
+    // element in the list of stores.
+    if (i > 0) {
+      int64_t CurrAddress = StoreNodes[i].OffsetFromBase;
+      if (CurrAddress - StartAddress != (ElementSizeBytes * i))
+        break;
+    }
 
     bool Alias = false;
     // Check if this store interferes with any of the loads that we found.
@@ -7653,7 +7658,6 @@
         Alias = true;
         break;
       }
-
     // We found a load that alias with this store. Stop the sequence.
     if (Alias)
       break;
@@ -9746,9 +9750,9 @@
   FindAliasInfo(Op1, Ptr1, Size1, SrcValue1, SrcValueOffset1,
                 SrcValueAlign1, SrcTBAAInfo1);
   return isAlias(Ptr0, Size0, SrcValue0, SrcValueOffset0,
-               SrcValueAlign0, SrcTBAAInfo0,
-               Ptr1, Size1, SrcValue1, SrcValueOffset1,
-               SrcValueAlign1, SrcTBAAInfo1);
+                 SrcValueAlign0, SrcTBAAInfo0,
+                 Ptr1, Size1, SrcValue1, SrcValueOffset1,
+                 SrcValueAlign1, SrcTBAAInfo1);
 }
 
 /// FindAliasInfo - Extracts the relevant alias information from the memory

Added: llvm/trunk/test/CodeGen/X86/2012-12-06-python27-miscompile.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-12-06-python27-miscompile.ll?rev=169516&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-12-06-python27-miscompile.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2012-12-06-python27-miscompile.ll Thu Dec  6 11:34:13 2012
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86 -mcpu=corei7 -mtriple=i686-pc-win32 | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.8.0"
+
+; Make sure that we are zeroing one memory location at a time using xorl and
+; not both using XMM registers.
+
+;CHECK: @foo
+;CHECK: xorl
+;CHECK-NOT: xmm
+;CHECK: ret
+define i32 @foo (i64* %so) nounwind uwtable ssp {
+entry:
+  %used = getelementptr inbounds i64* %so, i32 3
+  store i64 0, i64* %used, align 8
+  %fill = getelementptr inbounds i64* %so, i32 2
+  %L = load i64* %fill, align 8
+  store i64 0, i64* %fill, align 8
+  %cmp28 = icmp sgt i64 %L, 0
+  %R = sext i1 %cmp28 to i32
+  ret i32 %R
+}