[llvm-commits] [llvm] r169339 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/bt.ll
Evan Cheng
evan.cheng at apple.com
Tue Dec 4 16:10:38 PST 2012
Author: evancheng
Date: Tue Dec 4 18:10:38 2012
New Revision: 169339
URL: http://llvm.org/viewvc/llvm-project?rev=169339&view=rev
Log:
Add x86 isel lowering logic to form bit test with inverted condition. e.g.
x ^ -1.
Patch by David Majnemer.
rdar://12755626
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/bt.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=169339&r1=169338&r2=169339&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Dec 4 18:10:38 2012
@@ -8918,6 +8918,11 @@
return DAG.getNode(X86ISD::SAHF, dl, MVT::i32, TruncSrl);
}
+static bool isAllOnes(SDValue V) {
+ ConstantSDNode *C = dyn_cast<ConstantSDNode>(V);
+ return C && C->isAllOnesValue();
+}
+
/// LowerToBT - Result of 'and' is compared against zero. Turn it into a BT node
/// if it's possible.
SDValue X86TargetLowering::LowerToBT(SDValue And, ISD::CondCode CC,
@@ -8966,6 +8971,14 @@
}
if (LHS.getNode()) {
+ // If the LHS is of the form (x ^ -1) then replace the LHS with x and flip
+ // the condition code later.
+ bool Invert = false;
+ if (LHS.getOpcode() == ISD::XOR && isAllOnes(LHS.getOperand(1))) {
+ Invert = true;
+ LHS = LHS.getOperand(0);
+ }
+
// If LHS is i8, promote it to i32 with any_extend. There is no i8 BT
// instruction. Since the shift amount is in-range-or-undefined, we know
// that doing a bittest on the i32 value is ok. We extend to i32 because
@@ -8981,7 +8994,10 @@
RHS = DAG.getNode(ISD::ANY_EXTEND, dl, LHS.getValueType(), RHS);
SDValue BT = DAG.getNode(X86ISD::BT, dl, MVT::i32, LHS, RHS);
- unsigned Cond = CC == ISD::SETEQ ? X86::COND_AE : X86::COND_B;
+ X86::CondCode Cond = CC == ISD::SETEQ ? X86::COND_AE : X86::COND_B;
+ // Flip the condition if the LHS was a not instruction
+ if (Invert)
+ Cond = X86::GetOppositeBranchCondition(Cond);
return DAG.getNode(X86ISD::SETCC, dl, MVT::i8,
DAG.getConstant(Cond, MVT::i8), BT);
}
@@ -9239,11 +9255,6 @@
return C && C->isNullValue();
}
-static bool isAllOnes(SDValue V) {
- ConstantSDNode *C = dyn_cast<ConstantSDNode>(V);
- return C && C->isAllOnesValue();
-}
-
static bool isTruncWithZeroHighBitsInput(SDValue V, SelectionDAG &DAG) {
if (V.getOpcode() != ISD::TRUNCATE)
return false;
Modified: llvm/trunk/test/CodeGen/X86/bt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bt.ll?rev=169339&r1=169338&r2=169339&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bt.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bt.ll Tue Dec 4 18:10:38 2012
@@ -1,6 +1,4 @@
-; RUN: llc < %s -march=x86 | grep btl | count 28
-; RUN: llc < %s -march=x86 -mcpu=pentium4 | grep btl | not grep esp
-; RUN: llc < %s -march=x86 -mcpu=penryn | grep btl | not grep esp
+; RUN: llc < %s -mtriple=i386-apple-macosx -mcpu=penryn | FileCheck %s
; PR3253
; The register+memory form of the BT instruction should be usable on
@@ -21,6 +19,9 @@
define void @test2(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: test2
+; CHECK: btl %eax, %ecx
+; CHECK: jb
%tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
%tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
@@ -36,6 +37,9 @@
define void @test2b(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: test2b
+; CHECK: btl %eax, %ecx
+; CHECK: jb
%tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
@@ -51,6 +55,9 @@
define void @atest2(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: atest2
+; CHECK: btl %eax, %ecx
+; CHECK: jb
%tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
%tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
@@ -66,6 +73,8 @@
define void @atest2b(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: atest2b
+; CHECK: btl %eax, %ecx
%tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
@@ -81,6 +90,9 @@
define void @test3(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: test3
+; CHECK: btl %eax, %ecx
+; CHECK: jb
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
%tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
@@ -96,6 +108,9 @@
define void @test3b(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: test3b
+; CHECK: btl %eax, %ecx
+; CHECK: jb
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %x, %tmp29
%tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
@@ -111,6 +126,9 @@
define void @testne2(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: testne2
+; CHECK: btl %eax, %ecx
+; CHECK: jae
%tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
%tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
@@ -126,6 +144,9 @@
define void @testne2b(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: testne2b
+; CHECK: btl %eax, %ecx
+; CHECK: jae
%tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
@@ -141,6 +162,9 @@
define void @atestne2(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: atestne2
+; CHECK: btl %eax, %ecx
+; CHECK: jae
%tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
%tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
@@ -156,6 +180,9 @@
define void @atestne2b(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: atestne2b
+; CHECK: btl %eax, %ecx
+; CHECK: jae
%tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
@@ -171,6 +198,9 @@
define void @testne3(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: testne3
+; CHECK: btl %eax, %ecx
+; CHECK: jae
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
%tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
@@ -186,6 +216,9 @@
define void @testne3b(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: testne3b
+; CHECK: btl %eax, %ecx
+; CHECK: jae
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %x, %tmp29
%tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
@@ -201,6 +234,9 @@
define void @query2(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: query2
+; CHECK: btl %eax, %ecx
+; CHECK: jae
%tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
%tmp4 = icmp eq i32 %tmp3, 1 ; <i1> [#uses=1]
@@ -216,6 +252,9 @@
define void @query2b(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: query2b
+; CHECK: btl %eax, %ecx
+; CHECK: jae
%tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp eq i32 %tmp3, 1 ; <i1> [#uses=1]
@@ -231,6 +270,9 @@
define void @aquery2(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: aquery2
+; CHECK: btl %eax, %ecx
+; CHECK: jae
%tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
%tmp4 = icmp eq i32 %tmp3, 1 ; <i1> [#uses=1]
@@ -246,6 +288,9 @@
define void @aquery2b(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: aquery2b
+; CHECK: btl %eax, %ecx
+; CHECK: jae
%tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp eq i32 %tmp3, 1 ; <i1> [#uses=1]
@@ -261,6 +306,9 @@
define void @query3(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: query3
+; CHECK: btl %eax, %ecx
+; CHECK: jae
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
%tmp4 = icmp eq i32 %tmp3, %tmp29 ; <i1> [#uses=1]
@@ -276,6 +324,9 @@
define void @query3b(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: query3b
+; CHECK: btl %eax, %ecx
+; CHECK: jae
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %x, %tmp29
%tmp4 = icmp eq i32 %tmp3, %tmp29 ; <i1> [#uses=1]
@@ -291,6 +342,9 @@
define void @query3x(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: query3x
+; CHECK: btl %eax, %ecx
+; CHECK: jae
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
%tmp4 = icmp eq i32 %tmp29, %tmp3 ; <i1> [#uses=1]
@@ -306,6 +360,9 @@
define void @query3bx(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: query3bx
+; CHECK: btl %eax, %ecx
+; CHECK: jae
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %x, %tmp29
%tmp4 = icmp eq i32 %tmp29, %tmp3 ; <i1> [#uses=1]
@@ -321,6 +378,9 @@
define void @queryne2(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: queryne2
+; CHECK: btl %eax, %ecx
+; CHECK: jb
%tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
%tmp4 = icmp ne i32 %tmp3, 1 ; <i1> [#uses=1]
@@ -336,6 +396,9 @@
define void @queryne2b(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: queryne2b
+; CHECK: btl %eax, %ecx
+; CHECK: jb
%tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp ne i32 %tmp3, 1 ; <i1> [#uses=1]
@@ -351,6 +414,9 @@
define void @aqueryne2(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: aqueryne2
+; CHECK: btl %eax, %ecx
+; CHECK: jb
%tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
%tmp4 = icmp ne i32 %tmp3, 1 ; <i1> [#uses=1]
@@ -366,6 +432,9 @@
define void @aqueryne2b(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: aqueryne2b
+; CHECK: btl %eax, %ecx
+; CHECK: jb
%tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp ne i32 %tmp3, 1 ; <i1> [#uses=1]
@@ -381,6 +450,9 @@
define void @queryne3(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: queryne3
+; CHECK: btl %eax, %ecx
+; CHECK: jb
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
%tmp4 = icmp ne i32 %tmp3, %tmp29 ; <i1> [#uses=1]
@@ -396,6 +468,9 @@
define void @queryne3b(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: queryne3b
+; CHECK: btl %eax, %ecx
+; CHECK: jb
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %x, %tmp29
%tmp4 = icmp ne i32 %tmp3, %tmp29 ; <i1> [#uses=1]
@@ -411,6 +486,9 @@
define void @queryne3x(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: queryne3x
+; CHECK: btl %eax, %ecx
+; CHECK: jb
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
%tmp4 = icmp ne i32 %tmp29, %tmp3 ; <i1> [#uses=1]
@@ -426,6 +504,9 @@
define void @queryne3bx(i32 %x, i32 %n) nounwind {
entry:
+; CHECK: queryne3bx
+; CHECK: btl %eax, %ecx
+; CHECK: jb
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %x, %tmp29
%tmp4 = icmp ne i32 %tmp29, %tmp3 ; <i1> [#uses=1]
@@ -440,3 +521,16 @@
}
declare void @foo()
+
+; rdar://12755626
+define zeroext i1 @invert(i32 %flags, i32 %flag) nounwind {
+; CHECK: invert
+; CHECK: btl %eax, %ecx
+; CHECK: setae
+entry:
+ %neg = xor i32 %flags, -1
+ %shl = shl i32 1, %flag
+ %and = and i32 %shl, %neg
+ %tobool = icmp ne i32 %and, 0
+ ret i1 %tobool
+}
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