[llvm-commits] Fwd: [llvm] r169020 - /llvm/trunk/test/CodeGen/PowerPC/vec_mul.ll

[Adhemerval Zanella]

I believe a better approach would be just add the prefix match to be optional, like this:

--- a/test/CodeGen/PowerPC/vec_mul.ll
+++ b/test/CodeGen/PowerPC/vec_mul.ll
@@ -41,6 +41,6 @@ define <4 x float> @test_float(<4 x float>* %X, <4 x float>* %Y) {
 ; all bits set and shifting it 31 bits to left, resulting a an vector of 
 ; 4 x 0x80000000 (-0.0 as float).
 ; CHECK: test_float:
-; CHECK: vspltisw [[ZNEG:v[0-9]+]], -1
-; CHECK: vslw     {{v[0-9]+}}, [[ZNEG]], [[ZNEG]]
+; CHECK: vspltisw [[ZNEG:[v]*[0-9]+]], -1
+; CHECK: vslw     {{[v]*[0-9]+}}, [[ZNEG]], [[ZNEG]]
 ; CHECK: vmaddfp

On 11/30/2012 05:10 PM, Hal Finkel wrote:
> Chad,
>
> The PPC asm printer does not print the register-name prefix letters on non-Darwin platforms. The problem with the test is that it needs a triple ;)
>
> Thanks again,
> Hal
>
> ----- Original Message -----
>> From: "Chad Rosier" <mcrosier at apple.com>
>> To: "Adhemerval Zanella" <azanella at linux.vnet.ibm.com>
>> Cc: "llvm-commits" <llvm-commits at cs.uiuc.edu>
>> Sent: Friday, November 30, 2012 12:55:21 PM
>> Subject: [llvm-commits] Fwd: [llvm] r169020 - /llvm/trunk/test/CodeGen/PowerPC/vec_mul.ll
>>
>>
>> This test case was failing on our Darwin machines with the following
>> error:
>>
>>
>> llvm/test/CodeGen/PowerPC/vec_mul.ll:44:10: error: expected string
>> not found in input
>> ; CHECK: vspltisw [[ZNEG:[0-9]+]], -1
>>          ^
>> <stdin>:84:14: note: scanning from here
>> _test_float: ; @test_float
>>              ^
>> <stdin>:88:2: note: possible intended match here
>>  vspltisw v4, -1
>>  ^
>> --
>> so I attempted to fix it here. Unfortunately, the lab bots are now
>> screaming at me. Specifically, the ppc linux machines.. :(
>>
>>
>> Adhemerval/Takumi, would you mind taking a look?
>>
>>
>> Chad
>>
>>
>>
>> Begin forwarded message:
>>
>>
>>
>> From: Chad Rosier < mcrosier at apple.com >
>>
>> Subject: [llvm-commits] [llvm] r169020 -
>> /llvm/trunk/test/CodeGen/PowerPC/vec_mul.ll
>>
>> Date: November 30, 2012, 10:29:01 AM PST
>>
>> To: llvm-commits at cs.uiuc.edu
>>
>>
>> Author: mcrosier
>> Date: Fri Nov 30 12:29:01 2012
>> New Revision: 169020
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=169020&view=rev
>> Log:
>> test/CodeGen/PowerPC/vec_mul.ll: Fix register operands.
>>
>> Modified:
>> llvm/trunk/test/CodeGen/PowerPC/vec_mul.ll
>>
>> Modified: llvm/trunk/test/CodeGen/PowerPC/vec_mul.ll
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/vec_mul.ll?rev=169020&r1=169019&r2=169020&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/PowerPC/vec_mul.ll (original)
>> +++ llvm/trunk/test/CodeGen/PowerPC/vec_mul.ll Fri Nov 30 12:29:01
>> 2012
>> @@ -41,6 +41,6 @@
>> ; all bits set and shifting it 31 bits to left, resulting a an vector
>> of
>> ; 4 x 0x80000000 (-0.0 as float).
>> ; CHECK: test_float:
>> -; CHECK: vspltisw [[ZNEG:[0-9]+]], -1
>> -; CHECK: vslw {{[0-9]+}}, [[ZNEG]], [[ZNEG]]
>> +; CHECK: vspltisw [[ZNEG:v[0-9]+]], -1
>> +; CHECK: vslw {{v[0-9]+}}, [[ZNEG]], [[ZNEG]]
>> ; CHECK: vmaddfp
>>
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>