[llvm-commits] [llvm] r168329 - /llvm/trunk/docs/CodeGenerator.rst

[Sean Silva]

Author: silvas
Date: Mon Nov 19 15:18:50 2012
New Revision: 168329

URL: http://llvm.org/viewvc/llvm-project?rev=168329&view=rev
Log:
docs: Fix reference to "bold" part of code example.

Fixes PR14380.

The prose was referring to a "bold" part of the code example, where the
boldness was lost in the transition from HTML. Unlike HTML, where one
can easily have a <b> inside a <pre>, reStructuredText is generally
unable to represent such nested markup.

Hack around it with the :emphasise-lines: option to the  code-block
directive to single out the regions instead. Thankfully the regions are
close-enough to being full lines for this to work.

Modified:
    llvm/trunk/docs/CodeGenerator.rst

Modified: llvm/trunk/docs/CodeGenerator.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodeGenerator.rst?rev=168329&r1=168328&r2=168329&view=diff
==============================================================================
--- llvm/trunk/docs/CodeGenerator.rst (original)
+++ llvm/trunk/docs/CodeGenerator.rst Mon Nov 19 15:18:50 2012
@@ -968,7 +968,8 @@
 To perform this pattern match, the PowerPC backend includes the following
 instruction definitions:
 
-::
+.. code-block:: text
+  :emphasize-lines: 4-5,9
 
   def FMADDS : AForm_1<59, 29,
                       (ops F4RC:$FRT, F4RC:$FRA, F4RC:$FRC, F4RC:$FRB),
@@ -980,10 +981,10 @@
                       "fadds $FRT, $FRA, $FRB",
                       [(set F4RC:$FRT, (fadd F4RC:$FRA, F4RC:$FRB))]>;
 
-The portion of the instruction definition in bold indicates the pattern used to
-match the instruction.  The DAG operators (like ``fmul``/``fadd``) are defined
-in the ``include/llvm/Target/TargetSelectionDAG.td`` file.  " ``F4RC``" is the
-register class of the input and result values.
+The highlighted portion of the instruction definitions indicates the pattern
+used to match the instructions. The DAG operators (like ``fmul``/``fadd``)
+are defined in the ``include/llvm/Target/TargetSelectionDAG.td`` file.
+"``F4RC``" is the register class of the input and result values.
 
 The TableGen DAG instruction selector generator reads the instruction patterns
 in the ``.td`` file and automatically builds parts of the pattern matching code