[llvm-commits] [llvm] r167922 - /llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp

Adhemerval Zanella azanella at linux.vnet.ibm.com
Wed Nov 14 11:14:59 PST 2012


Craig

I believe this patch covers the Altivec lowering and also a required testcase. And
I'll wait you implement the ceil, trunc, rint, and nearbyint before including
the lowering for Altivec (mainly for testcase consistence).



On 11/14/2012 05:00 PM, Hal Finkel wrote:
> ----- Original Message -----
>> From: "Craig Topper" <craig.topper at gmail.com>
>> To: "Hal Finkel" <hfinkel at anl.gov>
>> Cc: "Adhemerval Zanella" <azanella at linux.vnet.ibm.com>, llvm-commits at cs.uiuc.edu
>> Sent: Wednesday, November 14, 2012 11:53:54 AM
>> Subject: Re: [llvm-commits] [llvm] r167922 - /llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
>>
>> I'm also looking into adding intrinsics for supporting ceil, trunc,
>> rint, and nearbyint for vectors. The ISD nodes exist already but
>> they currently only get created for scalar types when libcalls are
>> lowered. So if you want to go ahead and do the right thing for
>> FCEIL, FTRUNC, FRINT, FNEARBYINT of vectors while you're in there.
> Great, thanks! We could definitely use those.
>
>  -Hal
>
>>
>> On Wed, Nov 14, 2012 at 9:50 AM, Hal Finkel < hfinkel at anl.gov >
>> wrote:
>>
>>
>>
>> ----- Original Message -----
>>> From: "Adhemerval Zanella" < azanella at linux.vnet.ibm.com >
>>> To: "Hal Finkel" < hfinkel at anl.gov >
>>> Cc: "Craig Topper" < craig.topper at gmail.com >,
>>> llvm-commits at cs.uiuc.edu
>>> Sent: Wednesday, November 14, 2012 11:49:03 AM
>>> Subject: Re: [llvm-commits] [llvm] r167922 -
>>> /llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
>>>
>>> On 11/14/2012 03:47 PM, Hal Finkel wrote:
>>>> ----- Original Message -----
>>>>> From: "Craig Topper" < craig.topper at gmail.com >
>>>>> To: "Hal Finkel" < hfinkel at anl.gov >
>>>>> Cc: llvm-commits at cs.uiuc.edu , "Adhemerval Zanella"
>>>>> < azanella at linux.vnet.ibm.com >
>>>>> Sent: Wednesday, November 14, 2012 10:10:51 AM
>>>>> Subject: Re: [llvm-commits] [llvm] r167922 -
>>>>> /llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
>>>>>
>>>>> I know nothing about PowerPC. I was just trying llvm.floor on
>>>>> different targets.
>>>> That's why I copied Adhemerval :)
>>>>
>>>> Adhemerval, can you please either add lowering to the correct
>>>> instruction or verify that the current expansion makes sense?
>>>>
>>>> Thanks again,
>>>> Hal
>>> Yes, I'm doing it right now =)
>> Perfect, thanks!
>>
>> -Hal
>>
>>
>>
>>>>> On Wednesday, November 14, 2012, Hal Finkel wrote:
>>>>>
>>>>>
>>>>> ----- Original Message -----
>>>>>> From: "Craig Topper" < craig.topper at gmail.com >
>>>>>> To: llvm-commits at cs.uiuc.edu
>>>>>> Sent: Wednesday, November 14, 2012 2:11:25 AM
>>>>>> Subject: [llvm-commits] [llvm] r167922 -
>>>>>> /llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
>>>>>>
>>>>>> Author: ctopper
>>>>>> Date: Wed Nov 14 02:11:25 2012
>>>>>> New Revision: 167922
>>>>>>
>>>>>> URL: http://llvm.org/viewvc/llvm-project?rev=167922&view=rev
>>>>>> Log:
>>>>>> Set FFLOOR of vectors to expand to keep intruction selection
>>>>>> from
>>>>>> failing.
>>>>> We should have a test case for this. Also, this should match to
>>>>> the
>>>>> vrfim instruction, right? We already have an instruction
>>>>> definition,
>>>>> but it maps only to int_ppc_altivec_vrfim.
>>>>>
>>>>> Thanks again,
>>>>> Hal
>>>>>
>>>>>> Modified:
>>>>>> llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
>>>>>>
>>>>>> Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
>>>>>> URL:
>>>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=167922&r1=167921&r2=167922&view=diff
>>>>>> ==============================================================================
>>>>>> --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
>>>>>> (original)
>>>>>> +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Wed Nov
>>>>>> 14
>>>>>> 02:11:25 2012
>>>>>> @@ -347,6 +347,7 @@
>>>>>> setOperationAction(ISD::UREM, VT, Expand);
>>>>>> setOperationAction(ISD::FDIV, VT, Expand);
>>>>>> setOperationAction(ISD::FNEG, VT, Expand);
>>>>>> + setOperationAction(ISD::FFLOOR, VT, Expand);
>>>>>> setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Expand);
>>>>>> setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Expand);
>>>>>> setOperationAction(ISD::BUILD_VECTOR, VT, Expand);
>>>>>>
>>>>>>
>>>>>> _______________________________________________
>>>>>> llvm-commits mailing list
>>>>>> llvm-commits at cs.uiuc.edu
>>>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>>>>
>>>>> --
>>>>> Hal Finkel
>>>>> Postdoctoral Appointee
>>>>> Leadership Computing Facility
>>>>> Argonne National Laboratory
>>>>>
>>>>>
>>>>> --
>>>>> ~Craig
>>>>>
>>>
>> --
>> Hal Finkel
>> Postdoctoral Appointee
>> Leadership Computing Facility
>> Argonne National Laboratory
>>
>>
>>
>>
>> --
>> ~Craig
>>

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