[llvm-commits] [llvm] r167574 - in /llvm/trunk: lib/Target/ARM/ARMAsmPrinter.cpp test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll
Amara Emerson
amara.emerson at arm.com
Thu Nov 8 01:51:45 PST 2012
Author: aemerson
Date: Thu Nov 8 03:51:45 2012
New Revision: 167574
URL: http://llvm.org/viewvc/llvm-project?rev=167574&view=rev
Log:
Recommit modified r167540.
Improve ARM build attribute emission for architectures types.
This also changes the default architecture emitted for a generic CPU to "v7".
Modified:
llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
llvm/trunk/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll
Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=167574&r1=167573&r2=167574&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Thu Nov 8 03:51:45 2012
@@ -749,13 +749,28 @@
AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use,
ARMBuildAttrs::Allowed);
} else if (CPUString == "generic") {
- // FIXME: Why these defaults?
- AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v4T);
+ // For a generic CPU, we assume a standard v7a architecture in Subtarget.
+ AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v7);
+ AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch_profile,
+ ARMBuildAttrs::ApplicationProfile);
AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use,
ARMBuildAttrs::Allowed);
AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use,
- ARMBuildAttrs::Allowed);
- }
+ ARMBuildAttrs::AllowThumb32);
+ } else if (Subtarget->hasV7Ops()) {
+ AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v7);
+ AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use,
+ ARMBuildAttrs::AllowThumb32);
+ } else if (Subtarget->hasV6T2Ops())
+ AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v6T2);
+ else if (Subtarget->hasV6Ops())
+ AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v6);
+ else if (Subtarget->hasV5TEOps())
+ AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v5TE);
+ else if (Subtarget->hasV5TOps())
+ AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v5T);
+ else if (Subtarget->hasV4TOps())
+ AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v4T);
if (Subtarget->hasNEON() && emitFPU) {
/* NEON is not exactly a VFP architecture, but GAS emit one of
Modified: llvm/trunk/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll?rev=167574&r1=167573&r2=167574&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll Thu Nov 8 03:51:45 2012
@@ -13,12 +13,12 @@
; BASIC-NEXT: 0x00000000
; BASIC-NEXT: 0x00000000
; BASIC-NEXT: 0x0000003c
-; BASIC-NEXT: 0x00000020
+; BASIC-NEXT: 0x00000022
; BASIC-NEXT: 0x00000000
; BASIC-NEXT: 0x00000000
; BASIC-NEXT: 0x00000001
; BASIC-NEXT: 0x00000000
-; BASIC-NEXT: '411f0000 00616561 62690001 15000000 06020801 09011401 15011703 18011901'
+; BASIC-NEXT: '41210000 00616561 62690001 17000000 060a0741 08010902 14011501 17031801 1901'
; CORTEXA8: .ARM.attributes
; CORTEXA8-NEXT: 0x70000003
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